Patents by Inventor Jeffrey A. Zitz

Jeffrey A. Zitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180277396
    Abstract: An integrated circuit (IC) chip module includes a carrier, a stiffening frame, an IC chip, and a first directional heat spreader. A second directional heat spreader may further be arranged orthogonal to the first directional heat spreader. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes an opening that accepts the IC chip and may be attached to the top surface of the carrier. The IC chip is concentrically arranged within the opening of the stiffening frame. The first directional heat spreader is attached to the stiffening frame and to the IC chip and generally removes heat in a first opposing bivector direction. When included in the IC chip module, the second directional heat spreader is attached to the stiffening frame and to the first directional heat spreader and generally removes heat in a second opposing bivector direction orthogonal to the first opposing bivector direction.
    Type: Application
    Filed: June 1, 2018
    Publication date: September 27, 2018
    Inventors: Evan G. Colgan, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 10083886
    Abstract: In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: September 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20180233381
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect, a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Application
    Filed: April 12, 2018
    Publication date: August 16, 2018
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 10049896
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: August 14, 2018
    Assignee: International Business Machines Corporation
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 9947603
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20180076101
    Abstract: A laminate includes a plurality of buildup layers disposed on a core and a plurality of unit cells defined in the buildup layers. Each unit cell includes: at least one test via that passes through at least two of the buildup layers and that is electrically connected to testing locations on a probe accessible location of the laminate; and two or more dummy vias disposed in the unit cell. The dummy vias are arranged in the unit cell at one of a plurality of distances from the test via.
    Type: Application
    Filed: November 15, 2017
    Publication date: March 15, 2018
    Inventors: Sushumna Iruvanti, Shidong Li, Marek A. Orlowski, David L. Questad, Tuhin Sinha, Krishna R. Tunga, Thomas A. Wassick, Randall J. Werner, Jeffrey A. Zitz
  • Publication number: 20180068917
    Abstract: In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20180068916
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20180061733
    Abstract: An integrated circuit (IC) chip module includes a carrier, a stiffening frame, an IC chip, and a first directional heat spreader. A second directional heat spreader may further be arranged orthogonal to the first directional heat spreader. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes an opening that accepts the IC chip and may be attached to the top surface of the carrier. The IC chip is concentrically arranged within the opening of the stiffening frame. The first directional heat spreader is attached to the stiffening frame and to the IC chip and generally removes heat in a first opposing bivector direction. When included in the IC chip module, the second directional heat spreader is attached to the stiffening frame and to the first directional heat spreader and generally removes heat in a second opposing bivector direction orthogonal to the first opposing bivector direction.
    Type: Application
    Filed: November 3, 2017
    Publication date: March 1, 2018
    Inventors: Evan G. Colgan, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20180061732
    Abstract: An integrated circuit (IC) chip module includes a carrier, a stiffening frame, an IC chip, and a first directional heat spreader. A second directional heat spreader may further be arranged orthogonal to the first directional heat spreader. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes an opening that accepts the IC chip and may be attached to the top surface of the carrier. The IC chip is concentrically arranged within the opening of the stiffening frame. The first directional heat spreader is attached to the stiffening frame and to the IC chip and generally removes heat in a first opposing bivector direction. When included in the IC chip module, the second directional heat spreader is attached to the stiffening frame and to the first directional heat spreader and generally removes heat in a second opposing bivector direction orthogonal to the first opposing bivector direction.
    Type: Application
    Filed: November 3, 2017
    Publication date: March 1, 2018
    Inventors: Evan G. Colgan, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 9721870
    Abstract: A cooling structure for large electronic boards with closely-spaced heterogeneous die and packages is disclosed. The assembly includes a frame having a plurality of openings. The assembly further includes a cold plate mounted to the frame. The cold plate includes at least one inlet and at least one outlet and fluid channels in communication with the at least one inlet and the at least one outlet. The assembly further includes a heat sink mounted within each of the plurality of openings which in combination with sidewalls of the openings of the frame and the cold plate form individual compartments each of which are in fluid communication with the fluid channels.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: August 1, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul F. Bodenweber, Kenneth C. Marston, Kamal K. Sikka, Hilton T. Toy, Randall J. Werner, Jeffrey A. Zitz
  • Publication number: 20170196119
    Abstract: A cooling structure for large electronic boards with closely-spaced heterogeneous die and packages is disclosed. The assembly includes a frame having a plurality of openings. The assembly further includes a cold plate mounted to the frame. The cold plate includes at least one inlet and at least one outlet and fluid channels in communication with the at least one inlet and the at least one outlet. The assembly further includes a heat sink mounted within each of the plurality of openings which in combination with sidewalls of the openings of the frame and the cold plate form individual compartments each of which are in fluid communication with the fluid channels.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Inventors: Paul F. BODENWEBER, Kenneth C. MARSTON, Kamal K. SIKKA, Hilton T. TOY, Randall J. WERNER, Jeffrey A. ZITZ
  • Publication number: 20170178982
    Abstract: A laminate includes a plurality of buildup layers disposed on a core and a plurality of unit cells defined in the buildup layers. Each unit cell includes: at least one test via that passes through at least two of the buildup layers and that is electrically connected to testing locations on a probe accessible location of the laminate; and two or more dummy vias disposed in the unit cell. The dummy vias are arranged in the unit cell at one of a plurality of distances from the test via.
    Type: Application
    Filed: December 17, 2015
    Publication date: June 22, 2017
    Inventors: Sushumna Iruvanti, Shidong Li, Marek A. Orlowski, David L. Questad, Tuhin Sinha, Krishna R. Tunga, Thomas A. Wassick, Randall J. Werner, Jeffrey A. Zitz
  • Publication number: 20170170030
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20170170086
    Abstract: An electronic package includes a carrier and a semiconductor chip. In a first aspect a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: Sushumna Iruvanti, Shidong Li, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 9583408
    Abstract: Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 28, 2017
    Assignee: International Business Machines Corporation
    Inventors: Marcus E. Interrante, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
  • Publication number: 20170053845
    Abstract: Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.
    Type: Application
    Filed: August 21, 2015
    Publication date: February 23, 2017
    Inventors: Marcus E. INTERRANTE, Yi PAN, Hilton T. TOY, Jeffrey A. ZITZ
  • Publication number: 20160358836
    Abstract: An integrated circuit (IC) chip module includes a carrier, a stiffening frame, an IC chip, and a first directional heat spreader. A second directional heat spreader may further be arranged orthogonal to the first directional heat spreader. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes an opening that accepts the IC chip and may be attached to the top surface of the carrier. The IC chip is concentrically arranged within the opening of the stiffening frame. The first directional heat spreader is attached to the stiffening frame and to the IC chip and generally removes heat in a first opposing bivector direction. When included in the IC chip module, the second directional heat spreader is attached to the stiffening frame and to the first directional heat spreader and generally removes heat in a second opposing bivector direction orthogonal to the first opposing bivector direction.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 8, 2016
    Inventors: Evan G. Colgan, Yi Pan, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 9437515
    Abstract: Embodiments of the invention comprise a homogeneous heat spreading cap element in chip packages to facilitate better heat spreading and dissipation. The heat spreading cap comprises a single high-K graphite layer supported by a copper frame for increased stability and reduced thermal warpage during handling and operation while minimizing thermal penalty by reducing the amount of material having a relatively low heat conductivity that is needed in conventional heat spreading caps.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: September 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Evan G. Colgan, Taryn J. Davis, Chenzhou Lian, Yi Pan, Kamal K. Sikka, Jeffrey A. Zitz
  • Patent number: 9366591
    Abstract: An apparatus for determining a magnitude of a compressive load applied to a piston including a compliant film disposed between first and second elements is provided. The apparatus includes a first part movable with the first element in a movement direction along which the magnitude of the compressive load is to be determined, a second part movable with the second element in the movement direction and a sensor to measure a distance between the first and second parts in the movement direction, the measured distance being related to a deformation of the compliant film as the compressive load is applied.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: June 14, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul F. Bodenweber, Virendra R. Jadhav, Steven P. Ostrander, Kamal K. Sikka, Jiantao Zheng, Jeffrey A. Zitz