Patents by Inventor Jeffrey D. Punzalan

Jeffrey D. Punzalan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7554179
    Abstract: A multi-leadframe semiconductor package and method of manufacture includes a first leadframe having a die pad and a plurality of contact leads around the periphery of the die pad. A die is attached to the die pad and electrically connected to the plurality of contact leads. A heat spreader leadframe having a heat spreader and a plurality of terminal leads around the periphery of the heat spreader is provided. The die pad is attached to the heat spreader, and the plurality of contact leads is attached to the plurality of terminal leads.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: June 30, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Il Kwon Shim, Seng Guan Chow, Jeffrey D. Punzalan, Pandi Chelvam Marimuthu
  • Patent number: 7545032
    Abstract: An integrated circuit package system is provided including forming a mounting structure having an external interconnect, a paddle, and a tie bar; mounting an integrated circuit die on the paddle; soldering a stiffener structure; having an opening; on the mounting structure; connecting the stiffener structure to a ground; and molding the integrated circuit die and partially the stiffener structure through the opening.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 9, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Henry D. Bathan, Antonio B. Dimaano, Jr., Jeffrey D. Punzalan, Zigmund Ramirez Camacho
  • Patent number: 7541221
    Abstract: An integrated circuit package system including forming a leadframe having a lead with a leadfinger support of a predetermined height, and attaching an integrated circuit die with an electrical interconnect at a predetermined collapse height determined by the predetermined height of the leadfinger support.
    Type: Grant
    Filed: February 4, 2006
    Date of Patent: June 2, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Henry D. Bathan, Zigmund Ramirez Camacho, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20090085178
    Abstract: An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Jong-Woo Ha, Koo Hong Lee, Soo Won Lee, JuHyun Park, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Jairus Legaspi Pisigan
  • Publication number: 20090085177
    Abstract: An integrated circuit package system includes providing an integrated circuit die; attaching the integrated circuit die over a lead grid having lead blocks; and connecting a die interconnect to the integrated circuit die and the lead blocks.
    Type: Application
    Filed: September 27, 2007
    Publication date: April 2, 2009
    Inventors: Jairus Legaspi Pisigan, Jeffrey D. Punzalan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090079096
    Abstract: An integrated circuit package system comprising forming a first device unit, having a first external interconnect, and a second device unit, having a second external interconnect, in an array configuration; mounting an integrated circuit die over the first device unit; connecting the integrated circuit die and the first external interconnect; and encapsulating the integrated circuit die, the first device unit, and the second device unit with both the first external interconnect and the second external interconnect partially exposed.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Lionel Chien Tay, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Arnel Trasporto
  • Publication number: 20090072412
    Abstract: An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Abelardo Jr Advincula
  • Publication number: 20090072364
    Abstract: An integrated circuit package system is provided including forming a leadframe having a frame and a die paddle having leads thereon. The leads are held with respect to the die paddle. The leads are separated from the die paddle, and a die is attached to the die paddle. Bond wires are bonded between the leads and the die. The die and bond wires are encapsulated. The leadframe is singulated to separate the frame and the die paddle.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
  • Publication number: 20090072363
    Abstract: An integrated circuit package-in-package system includes: forming an integrated circuit package system including: connecting a first integrated circuit die and a lead, and forming an inner encapsulation covering the first integrated circuit die and a portion of the lead; mounting a second integrated circuit die to the integrated circuit package system; connecting the second integrated circuit die and the lead; and forming a package encapsulation covering the integrated circuit package system and the second integrated circuit die with the lead exposed.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 19, 2009
    Inventors: Zigmund Ramirez Camacho, Arnel Trasporto, Jeffrey D. Punzalan, Abelardo Jr Advincula
  • Publication number: 20090072366
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, a terminal pad, and an external interconnect with the external interconnect below the terminal pad; connecting an integrated circuit die with the terminal pad and the external interconnect; and forming an encapsulation, having a first side and a second side at an opposing side to the first side, surrounding the integrated circuit die with the terminal pad exposed at the first side and the external interconnect extending below the second side.
    Type: Application
    Filed: September 18, 2007
    Publication date: March 19, 2009
    Inventors: Guruprasad Badakere Govindaiah, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Patent number: 7498665
    Abstract: An integrated circuit leadless package system is presented comprising forming a QFN leadframe comprises providing a die pad, forming a fishtail tie-bar on the die pad, forming a row of an outer contact pad around the die pad, forming an additional outer contact pad around the fishtail tie-bar, and forming an inner contact pad in a staggered position from the outer contact pad, mounting an integrated circuit on the die pad of the QFN leadframe, and attaching a bond wire from the integrated circuit to the additional outer contact pad.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 3, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Leocadio M. Alabin, Il Kwon Shim, Henry D. Bathan, Jeffrey D. Punzalan
  • Patent number: 7479409
    Abstract: An integrated circuit package system includes an elevated edge leadframe array, isolating leadframes of the elevated edge leadframe array, validating integrated circuit die attached to the leadframes, and forming integrated circuit packages including the integrated circuit die.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 20, 2009
    Assignee: Stats Chippac LTD.
    Inventors: Zigmund Ramirez Camacho, Henry D. Bathan, Jose Alvin Caparas, Jeffrey D. Punzalan
  • Patent number: 7479692
    Abstract: An integrated circuit package system is provided including forming a paddle, forming a ring with a recess in the paddle, mounting a device in the recess, forming a slot in the ring, and mounting a heat sink in the slot over the device.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: January 20, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Antonio B. Dimaano, Jr., Il Kwon Shim, Henry D. Bathan, Jeffrey D. Punzalan
  • Publication number: 20090014849
    Abstract: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.
    Type: Application
    Filed: September 24, 2008
    Publication date: January 15, 2009
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20090008761
    Abstract: An integrated circuit package system includes: forming a flex bump over an integrated circuit device structure, the flex bump having both a base portion and an offset portion over the base portion; forming a first ball bond of a first internal interconnect over the offset portion; and encapsulating the integrated circuit device structure, the flex bump, and the first internal interconnect.
    Type: Application
    Filed: July 5, 2007
    Publication date: January 8, 2009
    Inventors: Jairus Legaspi Pisigan, Henry Descalzo Bathan, Arnel Trasporto, Jeffrey D. Punzalan
  • Publication number: 20090001563
    Abstract: An integrated circuit package in package system includes a package in package lead with a package in package lead surface substantially planar, attaching a first integrated circuit package having a first encapsulant surface substantially coplanar with the package in package lead surface, attaching a second integrated circuit near the first integrated circuit package, and forming a package in package encapsulant over the first integrated circuit package and the second integrated circuit.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jeffrey D. Punzalan
  • Publication number: 20090002961
    Abstract: A packaging system comprising: forming terminal leads; configuring a cavity by partially encapsulating the terminal leads with a compound; attaching an integrated circuit device, a micro-electromechanical system, a micro-mechanical system, or a combination thereof in the cavity; and bonding a cover to the terminal leads for enclosing the cavity.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Lionel Chien Hui Tay, Jeffrey D. Punzalan
  • Publication number: 20080303123
    Abstract: An integrated circuit package system includes: providing a lead terminal; forming a dummy lead near the lead terminal; positioning a base integrated circuit adjacent the lead terminal and the dummy lead; connecting a die connector to the base integrated circuit and the dummy lead; mounting a stackable integrated circuit over the base integrated circuit; and connecting another of the die connector to the stackable integrated circuit and the dummy lead.
    Type: Application
    Filed: June 5, 2008
    Publication date: December 11, 2008
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Jeffrey D. Punzalan
  • Publication number: 20080290485
    Abstract: An integrated circuit package system including: providing a die pad with a top, sides, and a bottom, the bottom having a relief with a flat surface and defining a wall and a center pad; mounting a barrier under the bottom of the die pad; mounting an integrated circuit die on the top of the die pad; encapsulating the integrated circuit die and the top and sides of the die pad with the wall preventing encapsulation from flowing along the barrier to reach the center pad; and mounting an external interconnect on the center pad.
    Type: Application
    Filed: May 20, 2008
    Publication date: November 27, 2008
    Inventors: Il Kwon Shim, Jeffrey D. Punzalan, Henry Descalzo Bathan
  • Patent number: 7449369
    Abstract: An integrated circuit package system is provided forming a lead from a padless lead frame, and encapsulating the lead for supporting an integrated circuit die with a first molding compound for encapsulation with a second molding compound.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: November 11, 2008
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jose Alvin Caparas, Arnel Trasporto, Jeffrey D. Punzalan