Patents by Inventor Jen-Hao Yeh

Jen-Hao Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200146137
    Abstract: A system includes a laser source operable to provide a laser beam, a laser amplifier having a gain medium operable to provide energy to the laser beam when the laser beam passes through the laser amplifier, and a residual gain monitor operable to provide a probe beam and operable to derive a residual gain of the laser amplifier from the probe beam when the probe beam passes through the laser amplifier while being offset from the laser beam in time or in path.
    Type: Application
    Filed: December 20, 2019
    Publication date: May 7, 2020
    Inventors: Chun-Lin Louis Chang, Jen-Hao Yeh, Han-Lung Chang, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20200137864
    Abstract: A method for monitoring a shock wave in an extreme ultraviolet light source includes irradiating a target droplet in the extreme ultraviolet light source apparatus of an extreme ultraviolet lithography tool with ionizing radiation to generate a plasma and to detect a shock wave generated by the plasma. One or more operating parameters of the extreme ultraviolet light source is adjusted based on the detected shock wave.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 30, 2020
    Inventors: Yen-Shuo SU, Jen-Hao YEH, Jhan-Hong YEH, Ting-Ya CHENG, Yee-Shian Henry TONG, Chun-Lin CHANG, Han-Lung CHANG, Li-Jui CHEN, Po-Chung CHENG
  • Publication number: 20200111909
    Abstract: A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen, Fu-Chih Yang, Chun-Lin Tsai
  • Patent number: 10580862
    Abstract: A high-voltage semiconductor device has a main high-voltage switch device and a current-sense device for mirroring the current through the main high-voltage switch device. The main high-voltage switch device has a plurality of switch cells arranged to form a first array on a semiconductor substrate. Each switch cell has a first cell width. The current-sense device has a plurality of sense cells arranged to form a second array on the semiconductor substrate. Each sense cell has a second cell width larger than the first cell width. The switch cells and the sense cells share a common gate electrode and a common drain electrode.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: March 3, 2020
    Assignee: LEADTREND TECHNOLOGY CORPORATION
    Inventors: Wan Wen Tseng, Jen-Hao Yeh, Yi-Rong Tu, Chin-Wen Hsiung
  • Publication number: 20200033194
    Abstract: A light source system is provided. The light source system is capable of measuring a polarization angle and includes a light source configured to emit an original light beam, and the original light beam has an original polarization angle. The light source system further includes an amplifying module configured to amplify the original light beam and generate a forward beam for hitting a target, and the forward beam has a forward polarization angle that is equal to the original polarization angle. The light source system further includes a polarization measurement unit, and the polarization measurement unit includes a first polarization measurement module configured to receive a first return beam and measure a first polarization angle of the first return beam. The first return beam is reflected from the target.
    Type: Application
    Filed: June 12, 2019
    Publication date: January 30, 2020
    Inventors: Jen-Hao YEH, Chun-Lin CHANG, Han-Lung CHANG, Li-Jui CHEN, Po-Chung CHENG
  • Publication number: 20200026179
    Abstract: A method and system for generating EUV light includes providing a laser beam having a Gaussian distribution. This laser beam can be then modified from a Gaussian distribution to a ring-like distribution. The modified laser beam is provided through an aperture in a collector and interfaces with a moving droplet target, which generates an extreme ultraviolet (EUV) wavelength light. The generated EUV wavelength light is provided to the collector away from the aperture. In some embodiments, a mask element may also be used to modify the laser beam to a shape.
    Type: Application
    Filed: September 29, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Lin Louis CHANG, Jen-Hao YEH, Tzung-Chi FU, Bo-Tsun LIU, Li-Jui CHEN, Po-Chung CHENG
  • Patent number: 10524345
    Abstract: A laser system includes a laser source operable to provide a laser beam; a laser amplifier having an input port and an output port and operable to amplify the laser beam, the laser beam travelling along a main beam path through the laser amplifier from the input port to the output port; and a residual gain monitor operable to provide a probe laser beam, the probe laser beam travelling along a probe beam path through the laser amplifier from the output port to the input port, wherein the residual gain monitor calculates a residual gain of the laser amplifier according to the probe laser beam.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: December 31, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Lin Louis Chang, Jen-Hao Yeh, Han-Lung Chang, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Patent number: 10510882
    Abstract: A device includes a buried well region and a first HVW region of the first conductivity, and an insulation region over the first HVW region. A drain region of the first conductivity type is disposed on a first side of the insulation region and in a top surface region of the first HVW region. A first well region and a second well region of a second conductivity type opposite the first conductivity type are on the second side of the insulation region. A second HVW region of the first conductivity type is disposed between the first and the second well regions, wherein the second HVW region is connected to the buried well region. A source region of the first conductivity type is in a top surface region of the second HVW region, wherein the source region, the drain region, and the buried well region form a JFET.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen, Fu-Chih Yang, Chun Lin Tsai
  • Patent number: 10429729
    Abstract: A method and system for generating EUV light includes providing a laser beam having a Gaussian distribution. This laser beam can be then modified from a Gaussian distribution to a ring-like distribution. The modified laser beam is provided through an aperture in a collector and interfaces with a moving droplet target, which generates an extreme ultraviolet (EUV) wavelength light. The generated EUV wavelength light is provided to the collector away from the aperture. In some embodiments, a mask element may also be used to modify the laser beam to a shape.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: October 1, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Lin Louis Chang, Jen-Hao Yeh, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Patent number: 10269897
    Abstract: A power metal-oxide-semiconductor field-effect transistor (MOSFET) device includes a first metal layer, a substrate, an epitaxy layer, a plurality of first trench wells, a plurality of second trench wells, a plurality of body structure layers, a plurality of polysilicon layers, and a second metal layer. A part of a depletion region is formed between each first trench well and the epitaxy layer and between a body structure layer corresponding to the each first trench well and the epitaxy layer, and a rest part of the depletion region is formed between a second trench well corresponding to the each first trench well and the epitaxy layer. The plurality of second trench wells increase a breakdown voltage of the power MOSFET device and reduce a conduction resistor of the power MOSFET device.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: April 23, 2019
    Assignee: Leadtrend Technology Corp.
    Inventors: Chih-Wen Hsiung, Jen-Hao Yeh, Yi-Rong Tu, Wan-Wen Tseng
  • Patent number: 10204896
    Abstract: A vertical double diffusion metal-oxide-semiconductor power device with thermal sensitivity unit includes a vertical double diffusion metal-oxide-semiconductor power transistor and at least one thermal sensitivity unit. The vertical double diffusion metal-oxide-semiconductor power transistor includes a first metal layer, a substrate layer, an epitaxy layer, a second metal layer, and a plurality of first polysilicon layers, wherein each first polysilicon layer of the plurality of first polysilicon layers corresponds to a first oxide layer, a first doping well and a second doping well with second conductivity type, a first doped region and a second doped region with first conductivity type, and a second oxide layer.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: February 12, 2019
    Assignee: Leadtrend Technology Corp.
    Inventors: Jen-Hao Yeh, Chiung-Feng Chou
  • Patent number: 10176431
    Abstract: A dissipative device has a planar configuration with one or more resistor elements formed on an insulating substrate. Conductors are formed on the insulating substrate and are coupled to the resistor element(s) to transmit signals to/from the resistor element(s). The geometry of and materials for the dissipative device allow the conductors to act as heat sinks, which conduct heat generated in the resistor element(s) to the substrate (and on to a coupled housing) and cool hot electrons generated by the resistor element(s) via electron-phonon coupling. The dissipative device can be used in cooling a signal to a qubit, a cavity system of a quantum superconducting qubit, or any other cryogenic device sensitive to thermal noise.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: January 8, 2019
    Assignees: University of Maryland, College Park, The United States of America, as represented by the Director, National Security Agency
    Inventors: Jen-Hao Yeh, Benjamin S. Palmer, Frederick C. Wellstood, Jay LeFebvre
  • Publication number: 20180323258
    Abstract: A high-voltage semiconductor device has a main high-voltage switch device and a current-sense device for mirroring the current through the main high-voltage switch device. The main high-voltage switch device has a plurality of switch cells arranged to form a first array on a semiconductor substrate. Each switch cell has a first cell width. The current-sense device has a plurality of sense cells arranged to form a second array on the semiconductor substrate. Each sense cell has a second cell width larger than the first cell width. The switch cells and the sense cells share a common gate electrode and a common drain electrode.
    Type: Application
    Filed: May 3, 2018
    Publication date: November 8, 2018
    Inventors: Wan Wen TSENG, Jen-Hao YEH, Yi-Rong TU, Chin-Wen HSIUNG
  • Patent number: 10121890
    Abstract: An embodiment of a structure provides an enhanced performing high voltage device, configured as a lateral diffused MOS (HV LDMOS) formed in a tri-well structure (a small n-well in an extended p-type well inside an n-type well) within the substrate with an anti-punch through layer and a buried layer below the n-type well, which reduces substrate leakage current to almost zero. The drain region is separated into two regions, one within the small n-well and one contacting the outer n-type well such that the substrate is available for electric potential lines during when a high drain voltage is applied.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: November 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ker Hsiao Huo, Chih-Chang Cheng, Ru-Yi Su, Jen-Hao Yeh, Fu-Chih Yang, Chun Lin Tsai
  • Publication number: 20180317308
    Abstract: A laser system includes a laser source operable to provide a laser beam; a laser amplifier having an input port and an output port and operable to amplify the laser beam, the laser beam travelling along a main beam path through the laser amplifier from the input port to the output port; and a residual gain monitor operable to provide a probe laser beam, the probe laser beam travelling along a probe beam path through the laser amplifier from the output port to the input port, wherein the residual gain monitor calculates a residual gain of the laser amplifier according to the probe laser beam.
    Type: Application
    Filed: April 5, 2018
    Publication date: November 1, 2018
    Inventors: Chun-Lin Louis Chang, Jen-Hao Yeh, Han-Lung Chang, Tzung-Chi Fu, Bo-Tsun Liu, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20180314145
    Abstract: A method and system for generating EUV light includes providing a laser beam having a Gaussian distribution. This laser beam can be then modified from a Gaussian distribution to a ring-like distribution. The modified laser beam is provided through an aperture in a collector and interfaces with a moving droplet target, which generates an extreme ultraviolet (EUV) wavelength light. The generated EUV wavelength light is provided to the collector away from the aperture. In some embodiments, a mask element may also be used to modify the laser beam to a shape.
    Type: Application
    Filed: January 30, 2018
    Publication date: November 1, 2018
    Inventors: Chun-Lin Louis CHANG, Jen-Hao YEH, Tzung-Chi FU, Bo-Tsun LIU, Li-Jui CHEN, Po-Chung CHENG
  • Publication number: 20180204907
    Abstract: A power metal-oxide-semiconductor field-effect transistor (MOSFET) device includes a first metal layer, a substrate, an epitaxy layer, a plurality of first trench wells, a plurality of second trench wells, a plurality of body structure layers, a plurality of polysilicon layers, and a second metal layer. A part of a depletion region is formed between each first trench well and the epitaxy layer and between a body structure layer corresponding to the each first trench well and the epitaxy layer, and a rest part of the depletion region is formed between a second trench well corresponding to the each first trench well and the epitaxy layer. The plurality of second trench wells increase a breakdown voltage of the power MOSFET device and reduce a conduction resistor of the power MOSFET device.
    Type: Application
    Filed: January 11, 2018
    Publication date: July 19, 2018
    Inventors: Chih-Wen Hsiung, Jen-Hao Yeh, Yi-Rong Tu, Wan-Wen Tseng
  • Publication number: 20180175190
    Abstract: A vertical double diffusion metal-oxide-semiconductor power device with high voltage start-up unit includes a vertical double diffusion metal-oxide-semiconductor power transistor and the high voltage start-up unit. The vertical double diffusion metal-oxide-semiconductor power transistor includes a first metal layer, a substrate layer with first conductivity type, an epitaxy layer with first conductivity type, a second metal layer, and a plurality of polysilicon layers. The substrate layer is formed on the first metal layer. The epitaxy layer is formed on the substrate layer. The plurality of polysilicon layers are formed on the epitaxy layer. The second metal layer is formed on the plurality of polysilicon layers and the epitaxy layer. The high voltage start-up unit is formed on the epitaxy layer, wherein the high voltage start-up unit is used for providing a two-dimensional direction start-up current to the vertical double diffusion metal-oxide-semiconductor power device.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 21, 2018
    Inventor: Jen-Hao Yeh
  • Publication number: 20180175019
    Abstract: A vertical double diffusion metal-oxide-semiconductor power device with thermal sensitivity unit includes a vertical double diffusion metal-oxide-semiconductor power transistor and at least one thermal sensitivity unit. The vertical double diffusion metal-oxide-semiconductor power transistor includes a first metal layer, a substrate layer, an epitaxy layer, a second metal layer, and a plurality of first polysilicon layers, wherein each first polysilicon layer of the plurality of first polysilicon layers corresponds to a first oxide layer, a first doping well and a second doping well with second conductivity type, a first doped region and a second doped region with first conductivity type, and a second oxide layer.
    Type: Application
    Filed: December 14, 2017
    Publication date: June 21, 2018
    Inventors: Jen-Hao Yeh, Chiung-Feng Chou
  • Patent number: 9793385
    Abstract: A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), and more particularly an insulated gate bipolar junction transistor (IGBT), is disclosed. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: October 17, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ker-Hsiao Huo, Fu-Chih Yang, Jen-Hao Yeh, Chun Lin Tsai, Chih-Chang Cheng, Ru-Yi Su