Patents by Inventor Jiang Hu

Jiang Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040216072
    Abstract: A method, computer program product, and data processing system for porosity-aware buffered Steiner tree construction are disclosed. A preferred embodiment begins with a timing-driven Steiner tree generated without regard for porosity, then applies a plate-based adjustment guided by length-based buffer insertion. After performing localized blockage avoidance, the resulting tree is then passed to a buffer placement algorithm, such as van Ginneken's algorithm, to obtain a porosity-aware buffered Steiner tree.
    Type: Application
    Filed: April 17, 2003
    Publication date: October 28, 2004
    Applicant: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Rama Gopal Gandham, Jiang Hu, Stephen Thomas Quay
  • Publication number: 20040123261
    Abstract: A method, computer program product, and data processing system for inserting buffers into integrated circuit routing trees are disclosed. The present invention dynamically modifies a Steiner tree configuration as needed to derive a maximal slack solution that takes into account blockages such as those presented by IP blocks.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 24, 2004
    Applicant: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Rama Gopal Gandham, Jiang Hu, Stephen Thomas Quay
  • Publication number: 20040064793
    Abstract: An apparatus and method for incorporating driver sizing into buffer insertion such that the two optimization techniques are performed simultaneously are provided. In particular, the apparatus and method extends van Ginneken's algorithm to handle driver sizing by treating a source node as a “driver library”. With the apparatus and method, the circuit design is converted to a Steiner tree representation of the circuit design. Buffer insertion is performed on the Steiner tree using the van Ginneken algorithm to generate a first set of possible optimal solutions. For each solution in the first set, a driver of the same type as the original driver in the Steiner tree is selected from a driver library and virtually inserted into the solution. A delay penalty is retrieved for the selected driver. This delay penalty is then used along with the new driver's characteristics to generate a second set of solutions based on the first set of solutions.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 1, 2004
    Applicant: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Chong-Nuen Chu, Rama Gopal Gandham, Milos Hrkic, Jiang Hu, Chandramouli V. Kashyap, Stephen Thomas Quay
  • Patent number: 6591411
    Abstract: An apparatus and method for determining buffered Steiner trees for complex circuits is provided. The apparatus and method first clusters sinks with similar characteristics such as criticality, polarity and distance. The purpose of this step is to potentially isolate positive sinks from negative ones and non-critical sinks from critical ones. The present invention then constructs low-level Steiner trees over each of these clusters. Finally, a top-level timing driven Steiner tree is computed where each cluster is treated as a sink. The top-level tree is then merged with the low-level trees to yield a solution for the entire net.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: July 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Rama Gopal Gandham, Jiang Hu, Stephen Thomas Quay, Andrew James Sullivan
  • Publication number: 20020184607
    Abstract: A method, system, and computer program product for allocating buffer and wire placement in an integrated circuit design is provided. In one embodiment, the surface of a integrated circuit design is represented as a tile graph. Allocation of buffer locations for selected tiles in the tile graph is then received and nets are routed between associated sources and sinks. Buffer locations within selected tiles are then selectively assigned based upon buffer needs of the nets, wherein the nets are routed through selected tiles and assigned buffer locations using a cost minimization algorithm.
    Type: Application
    Filed: April 19, 2001
    Publication date: December 5, 2002
    Applicant: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Jiang Hu, Paul Gerard Villarrubia
  • Publication number: 20020133799
    Abstract: An apparatus and method for determining buffered Steiner trees for complex circuits is provided. The apparatus and method first clusters sinks with similar characteristics such as criticality, polarity and distance. The purpose of this step is to potentially isolate positive sinks from negative ones and non-critical sinks from critical ones. The present invention then constructs low-level Steiner trees over each of these clusters. Finally, a top-level timing driven Steiner tree is computed where each cluster is treated as a sink. The top-level tree is then merged with the low-level trees to yield a solution for the entire net.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 19, 2002
    Applicant: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Rama Gopal Gandham, Jiang Hu, Stephen Thomas Quay, Andrew James Sullivan
  • Patent number: 6401234
    Abstract: A method and system for re-routing interconnects within an integrated circuit design having blockages and bays is disclosed. A net within the integrated circuit design is initially decomposed into multiple two-paths. The net includes interconnects previously routed by utilizing a Steiner tree routing algorithm. Next, a cost associated with each of the two-paths is calculated. A two-path having a a high cost is subsequently selected and re-routed with a lower cost two-path.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: Charles Jay Alpert, Rama Gopal Gandham, Jiang Hu, Jose Luis Neves, Stephen Thomas Quay