Patents by Inventor Jianheng Li
Jianheng Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088301Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2eV?1 to about 5e11 cm?2eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: ApplicationFiled: April 27, 2023Publication date: March 14, 2024Inventors: Jianheng LI, Lai ZHAO, Yujia ZHAI, Soo Young CHOI
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Patent number: 11913112Abstract: Processes for depositing silicon-containing films (e.g., silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films) are performed using halidosilane precursors. Examples of halidosilane precursor compounds described herein, include, but are not limited to, monochlorodisilane (MCDS), monobromodisilane (MBDS), monoiododisilane (MIDS), monochlorotrisilane (MCTS), and monobromotrisilane (MBTS), monoiodotrisilane (MITS).Type: GrantFiled: January 27, 2022Date of Patent: February 27, 2024Assignee: Versum Materials US, LLCInventors: Xinjian Lei, Jianheng Li, John Francis Lehmann, Alan Charles Cooper
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Patent number: 11732351Abstract: Described herein are conformal films and methods for forming a conformal metal or metalloid doped silicon nitride dielectric film wherein the conformal metal is zirconium, hafnium, titanium, tantalum, or tungsten. A method includes providing a substrate in a reactor; introducing into the reactor an at least one metal precursor which reacts; purging the reactor with a purge gas; introducing into the reactor an organoaminosilane precursors to react on at least a portion of the surface of the substrate to provide a chemisorbed layer; introducing a plasma comprising nitrogen and an inert gas into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated; and optionally purge the reactor with an inert gas; and the steps are repeated until a desired thickness of the conformal metal nitride film is obtained.Type: GrantFiled: August 26, 2021Date of Patent: August 22, 2023Assignee: Versum Materials US, LLCInventors: Xinjian Lei, Moo-Sung Kim, Jianheng Li
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Patent number: 11670722Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2eV?1 to about 5e11 cm?2eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: GrantFiled: June 2, 2022Date of Patent: June 6, 2023Assignee: Applied Materials, Inc.Inventors: Jianheng Li, Lai Zhao, Yujia Zhai, Soo Young Choi
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Publication number: 20220293793Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2eV?1 to about 5e11 cm?2eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: ApplicationFiled: June 2, 2022Publication date: September 15, 2022Inventors: Jianheng LI, Lai ZHAO, Yujia ZHAI, Soo Young CHOI
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Patent number: 11380801Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2 eV?1 to about 5e11 cm?2 eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: GrantFiled: August 28, 2020Date of Patent: July 5, 2022Assignee: Applied Materials, Inc.Inventors: Jianheng Li, Lai Zhao, Yujia Zhai, Soo Young Choi
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Publication number: 20220157601Abstract: A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about ?20° C. to about 100° C.; increasing pressure in the reactor to at least 10 torr; and introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties.Type: ApplicationFiled: January 27, 2022Publication date: May 19, 2022Applicant: Versum Materials US, LLCInventors: Jianheng Li, Raymond Nicholas Vrtis, Robert Gordon Ridgeway, Manchao Xiao, Xinjian Lei
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Publication number: 20220154331Abstract: Halidosilane compounds, processes for synthesizing halidosilane compounds, compositions comprising halidosilane precursors, and processes for depositing silicon-containing films (e.g., silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films) using halidosilane precursors. Examples of halidosilane precursor compounds described herein, include, but are not limited to, monochlorodisilane (MCDS), monobromodisilane (MBDS), monoiododisilane (MIDS), monochlorotrisilane (MCTS), and monobromotrisilane (MBTS), monoiodotrisilane (MITS). Also described herein are methods for depositing silicon containing films such as, without limitation, silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films, at one or more deposition temperatures of about 500° C. or less.Type: ApplicationFiled: January 27, 2022Publication date: May 19, 2022Applicant: VERSUM MATERIALS US, LLCInventors: XINJIAN LEI, JIANHENG LI, JOHN FRANCIS LEHMANN, ALAN CHARLES COOPER
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Patent number: 11270880Abstract: A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about ?20° C. to about 400° C.; introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties.Type: GrantFiled: September 24, 2019Date of Patent: March 8, 2022Assignee: Versum Materials US, LLCInventors: Jianheng Li, Raymond Nicholas Vrtis, Robert Gordon Ridgeway, Manchao Xiao, Xinjian Lei
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Patent number: 11268190Abstract: Processes for depositing silicon-containing films (e.g., silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films) are performed using halidosilane precursors. Examples of halidosilane precursor compounds described herein, include, but are not limited to, monochlorodisilane (MCDS), monobromodisilane (MBDS), monoiododisilane (MIDS), monochlorotrisilane (MCTS), and monobromotrisilane (MBTS), monoiodotrisilane (MITS). Also described herein are methods for depositing silicon containing films such as, without limitation, silicon, amorphous silicon, silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, silicon carbonitride, doped silicon films, and metal-doped silicon nitride films, at one or more deposition temperatures of about 500° C. or less.Type: GrantFiled: June 14, 2016Date of Patent: March 8, 2022Assignee: Versum Materials US, LLCInventors: Xinjian Lei, Jianheng Li, John Francis Lehmann, Alan Charles Cooper
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Publication number: 20210388489Abstract: Described herein are conformal films and methods for forming a conformal metal or metalloid doped silicon nitride dielectric film wherein the conformal metal is zirconium, hafnium, titanium, tantalum, or tungsten. A method includes providing a substrate in a reactor; introducing into the reactor an at least one metal precursor which reacts; purging the reactor with a purge gas; introducing into the reactor an organoaminosilane precursors to react on at least a portion of the surface of the substrate to provide a chemisorbed layer; introducing a plasma comprising nitrogen and an inert gas into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated; and optionally purge the reactor with an inert gas; and the steps are repeated until a desired thickness of the conformal metal nitride film is obtained.Type: ApplicationFiled: August 26, 2021Publication date: December 16, 2021Applicant: VERSUM MATERIALS US, LLCInventors: Xinjian Lei, Moo-Sung Kim, Jianheng Li
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Patent number: 11142658Abstract: Bisaminoalkoxysilanes of Formula I, and methods using same, are described herein: R1Si(NR2R3)(NR4R5)OR6??I where R1 is selected from hydrogen, a C1 to C10 linear alkyl group, a C3 to C10 branched alkyl group, a C3 to C10 cyclic alkyl group, a C3 to C10 alkenyl group, a C3 to C10 alkynyl group, a C4 to C10 aromatic hydrocarbon group; R2, R3, R4, and R5 are each independently selected from hydrogen, a C4 to C10 branched alkyl group, a C3 to C10 cyclic alkyl group, a C3 to C10 alkenyl group, a C3 to C10 alkynyl group, and a C4 to C10 aromatic hydrocarbon group; R6 is selected from a C1 to C10 linear alkyl group, a C3 to C10 branched alkyl group, a C3 to C10 cyclic alkyl group, a C3 to C10 alkenyl group, a C2 to C10 alkynyl group, and a C4 to C10 aromatic hydrocarbon group.Type: GrantFiled: August 9, 2019Date of Patent: October 12, 2021Assignee: Versum Materials US, LLCInventors: Daniel P. Spence, Xinjian Lei, Ronald Martin Pearlstein, Manchao Xiao, Jianheng Li
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Patent number: 11104990Abstract: Described herein are conformal films and methods for forming a conformal Group 4, 5, 6, 13 metal or metalloid doped silicon nitride dielectric film. In one aspect, there is provided a method of forming an aluminum silicon nitride film comprising the steps of: providing a substrate in a reactor; introducing into the reactor an at least one metal precursor which reacts on at least a portion of the surface of the substrate to provide a chemisorbed layer; purging the reactor with a purge gas; introducing into the reactor an organoaminosilane precursors to react on at least a portion of the surface of the substrate to provide a chemisorbed layer; introducing a plasma comprising nitrogen and an inert gas into the reactor to react with at least a portion of the chemisorbed layer and provide at least one reactive site wherein the plasma is generated at a power density ranging from about 0.01 to about 1.Type: GrantFiled: September 9, 2016Date of Patent: August 31, 2021Assignee: VERSUM MATERIALS US, LLCInventors: Xinjian Lei, Moo-Sung Kim, Jianheng Li
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Patent number: 11017998Abstract: A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about ?20° C. to about 100° C.; increasing pressure in the reactor to at least 10 torr; and introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties.Type: GrantFiled: June 11, 2018Date of Patent: May 25, 2021Assignee: Versum Materials US, LLCInventors: Jianheng Li, Raymond Nicholas Vrtis, Robert Gordon Ridgeway, Manchao Xiao, Xinjian Lei
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Publication number: 20210140040Abstract: Described herein are compositions and methods using same for forming a silicon-containing film such as without limitation a silicon oxide, silicon nitride, silicon oxynitride, a carbon-doped silicon nitride, or a carbon-doped silicon oxide film on at least a surface of a substrate having a surface feature. In one aspect, the silicon-containing films are deposited using a compound having Formula I or II described herein.Type: ApplicationFiled: October 30, 2020Publication date: May 13, 2021Applicant: Versum Materials US, LLCInventors: JIANHENG LI, XINJIAN LEI, ROBERT G. RIDGEWAY, RAYMOND N. VRTIS, MANCHAO XIAO, RICHARD HO
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Patent number: 10985013Abstract: Described herein is an apparatus comprising a plurality of silicon-containing layers wherein the silicon-containing layers are selected from a silicon oxide and a silicon nitride layer or film. Also described herein are methods for forming the apparatus to be used, for example, as 3D vertical NAND flash memory stacks. In one particular aspect or the apparatus, the silicon oxide layer comprises slightly compressive stress and good thermal stability. In this or other aspects of the apparatus, the silicon nitride layer comprises slightly tensile stress and less than 300 MPa stress change after up to about 800° C. thermal treatment. In this or other aspects of the apparatus, the silicon nitride layer etches much faster than the silicon oxide layer in hot H3PO4, showing good etch selectivity.Type: GrantFiled: June 4, 2019Date of Patent: April 20, 2021Assignee: Versum Materials US, LLCInventors: Jianheng Li, Robert G. Ridgeway, Xinjian Lei, Raymond N. Vrtis, Bing Han, Madhukar B. Rao
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Patent number: 10923327Abstract: Embodiments described herein generally relate to apparatus and methods for processing a substrate utilizing a high radio frequency (RF) power. The high RF power enables deposition of films on the substrate with more desirable properties. A first plurality of insulating members is disposed on a plurality of brackets and extends laterally inward from a chamber body. A second plurality of insulating members is disposed on the chamber body and extends from the first plurality of insulating members to a support surface of the chamber body. The insulating members reduce the occurrence of arcing between the plasma and the chamber body.Type: GrantFiled: August 1, 2018Date of Patent: February 16, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Jianheng Li, Lai Zhao, Robin L. Tiner, Allen K. Lau, Gaku Furuta, Soo Young Choi
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Publication number: 20210043446Abstract: A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor which is at a temperature of from about ?20° C. to about 100° C.; increasing pressure in the reactor to at least 10 torr; and introducing into the reactor at least one silicon-containing compound having at least one acetoxy group to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon oxide coating has a low k and excellent mechanical properties.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Versum Materials US, LLCInventors: Jianheng Li, Raymond Nicholas Vrtis, Robert Gordon Ridgeway, Manchao Xiao, Xinjian Lei
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Publication number: 20200395485Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2 eV?1 to about 5e11 cm?2 eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: ApplicationFiled: August 28, 2020Publication date: December 17, 2020Inventors: Jianheng Li, Lai Zhao, Yujia Zhai, Soo Young Choi
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Patent number: 10804408Abstract: Embodiments described herein provide thin film transistors (TFTs) and processes to reduce plasma induced damage in TFTs. In one embodiment, a buffer layer is disposed over a substrate and a semiconductor layer is disposed over the buffer layer. A gate dielectric layer is disposed over the semiconductor layer. The gate dielectric layer contacts the semiconductor layer at an interface. The gate electrode 204 is disposed over the gate dielectric layer. The gate dielectric layer has a Dit of about 5e10 cm?2eV?1 to about 5e11 cm?2eV?1 and a hysteresis of about 0.10 V to about 0.30 V improve performance capability of the TFT while having a breakdown field between about 6 MV/cm and about 10 MV/cm.Type: GrantFiled: September 27, 2018Date of Patent: October 13, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Jianheng Li, Lai Zhao, Yujia Zhai, Soo Young Choi