Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: An antenna module includes a fan-out semiconductor package including an IC, an encapsulant encapsulating at least a portion of the IC, a core member having a first side surface facing the IC or the encapsulant, and a connection member including at least one wiring layer electrically connected to the IC and the core member and at least one insulating layer; and an antenna package including a plurality of first directional antenna members configured to transmit or receive a first RF signal. The fan-out semiconductor package further includes at least one second directional antenna member disposed on a second side surface of the core member opposing the first side surface of the core member, stood up from a position electrically connected to at least one wiring layer, and configured to transmit or receive a second RF signal.

Abstract: An antenna module includes a connection member, an integrated circuit (IC), a dielectric layer, antenna members, feed vias, and a plating member. The connection member includes one or more wiring layer(s) and insulating layer(s). The IC is disposed on one surface of the connection member and is electrically connected to the wiring layer(s). The dielectric layer is disposed on another surface of the connection member. The antenna members are disposed in the dielectric layer, and the feed vias are disposed in the dielectric layer so that each has one end electrically connected to a corresponding antenna member and the other end electrically connected to a corresponding one of the wiring layer(s). The plating member is disposed in the dielectric layer to surround side surfaces of the feed vias. The dielectric layer has a dielectric constant Dk greater than that of at least one insulating layer.

Abstract: An antenna module includes a fan-out semiconductor package including an IC, an encapsulant encapsulating at least a portion of the IC, a core member having a first side surface facing the IC or the encapsulant, and a connection member including at least one wiring layer electrically connected to the IC and the core member and at least one insulating layer; and an antenna package including a plurality of first directional antenna members configured to transmit or receive a first RF signal. The fan-out semiconductor package further includes at least one second directional antenna member disposed on a second side surface of the core member opposing the first side surface of the core member, stood up from a position electrically connected to at least one wiring layer, and configured to transmit or receive a second RF signal.

Abstract: Provided are P-type semiconductor layer, P-type multilevel element, and manufacturing method for the element. The P-type multilevel element comprises a gate electrode, an active structure overlapping the gate electrode, a gate insulating layer disposed between the gate electrode and the active structure, and source and drain electrodes electrically connected to both ends of the active structure, respectively. The active structure has a first P-type active layer, a second P-type active layer, and a barrier layer disposed between the first P-type active layer and the second P-type active layer. A threshold voltage for forming a channel in the first P-type active layer and a threshold voltage for forming a channel in the second P-type active layer have different values.

Abstract: An antenna module includes: an antenna substrate including an antenna pattern; a semiconductor package disposed on a lower surface of the antenna substrate, electrically connected to the antenna substrate, and having at least one semiconductor chip embedded therein; and an electronic component disposed on the lower surface or a side surface of the antenna substrate, electrically connected to the antenna substrate, and spaced apart from the semiconductor package by a predetermined distance. The electronic component has a thickness greater than that of the semiconductor chip.

Abstract: A fan-out sensor package includes: a first semiconductor chip module including a first connection member having a first through-hole and a first wiring layer, a first semiconductor chip disposed in the first through-hole and having an active surface on which a sensing region and first connection pads are disposed, and an encapsulant encapsulating at least portions of the first connection member and the first semiconductor chip and filling at least portions of the first through-hole; a redistribution module having a second through-hole exposing at least a portion of the sensing region and including a redistribution layer; and electrical connection structures electrically connecting the first wiring layer and the first connection pads to the redistribution layer.

Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: An antenna module includes a connection member, an integrated circuit (IC), a dielectric layer, antenna members, feed vias, and a plating member. The connection member includes one or more wiring layer(s) and insulating layer(s). The IC is disposed on one surface of the connection member and is electrically connected to the wiring layer(s). The dielectric layer is disposed on another surface of the connection member. The antenna members are disposed in the dielectric layer, and the feed vias are disposed in the dielectric layer so that each has one end electrically connected to a corresponding antenna member and the other end electrically connected to a corresponding one of the wiring layer(s). The plating member is disposed in the dielectric layer to surround side surfaces of the feed vias. The dielectric layer has a dielectric constant Dk greater than that of at least one insulating layer.

Abstract: An antenna module includes a fan-out semiconductor package including an IC, an encapsulant encapsulating at least a portion of the IC, a core member having a first side surface facing the IC or the encapsulant, and a connection member including at least one wiring layer electrically connected to the IC and the core member and at least one insulating layer; and an antenna package including a plurality of first directional antenna members configured to transmit or receive a first RF signal. The fan-out semiconductor package further includes at least one second directional antenna member disposed on a second side surface of the core member opposing the first side surface of the core member, stood up from a position electrically connected to at least one wiring layer, and configured to transmit or receive a second RF signal.

Abstract: A substrate for a camera module includes: a first substrate; an image sensor installed on the first substrate and a memory chip installed to be embedded in the first substrate. The first substrate includes a soft substrate portion disposed at a central portion of the first substrate, and a hard substrate portion formed on upper and lower portions of the soft substrate portion, and at least a portion of the memory chip is disposed in an installation hole formed in the soft substrate portion.

Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: A layer forming method according to one embodiment of the present invention comprises: a source gas dosing/pressurizing step of dosing a source gas into a chamber having a substrate loaded therein in a state in which the outlet of the chamber is closed, thereby increasing the pressure in the chamber and adsorbing the source gas onto the substrate; a first main purging step of purging the chamber, after the source gas dosing/pressurizing step; a reactive gas dosing step of dosing a reactive gas into the chamber, after the first main purging step; and a second main purging step of purging the chamber, after the reactive gas dosing step.

Abstract: A layer according to one embodiment of the present invention may exhibit a first number of electron states in a low-level electron energy range in a conduction band, and exhibit a second number of electron states in a high-level electron energy range higher than the low-level electron energy level in the conduction band, wherein localized states may exist between the low-level electron energy range and the high-level electron energy level.

Abstract: An antenna module includes: a connection member including at least one wiring layer and at least one insulating layer; an integrated circuit (IC) disposed on a first surface of the connection member and electrically connected to the at least one wiring layer; an antenna package including antenna members configured to transmit or receive a radio frequency (RF) signal, a feed vias each having one end electrically connected to a respective one of the antenna members and another end electrically connected to the at least one wiring layer, and a dielectric layer having a height greater than a height of the at least one insulating layer, and having a first surface facing a second surface of the connection member; and dielectric members disposed in positions corresponding to the antenna members on the second surface of the antenna package.

Abstract: A substrate for a camera module includes: a first substrate; an image sensor installed on the first substrate and a memory chip installed to be embedded in the first substrate. The first substrate includes a soft substrate portion disposed at a central portion of the first substrate, and a hard substrate portion formed on upper and lower portions of the soft substrate portion, and at least a portion of the memory chip is disposed in an installation hole formed in the soft substrate portion.

Abstract: There are provided a package board and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, a package board includes: a first insulating layer; a second insulating layer formed beneath the first insulating layer; a capacitor embedded in the first insulating layer and including a first electrode, a second electrode, and a dielectric layer formed between the first electrode and the second electrode; circuit layers formed on the first insulating layer and the second insulating layer; and a via formed between the capacitor and the circuit layers or between the circuit layers formed on the first insulating layer and the second insulating layer to electrically connect thererbetween, wherein an upper surface of the first electrode is formed to be exposed from the first insulating layer.

Abstract: A package substrate, a package, a package on package, and a manufacturing method of a package substrate. A package substrate according to one exemplary embodiment includes: an insulating layer; a circuit layer formed on the insulating layer; and a capacitor including a lower electrode, an upper electrode, and a dielectric layer formed between the lower electrode and the upper electrode, the lower electrode and the dielectric layer being buried in the insulating layer and the upper electrode being formed on an upper portion of the insulating layer.

Abstract: There are provided a package board and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, the package board includes: a first insulating layer formed with a penetrating cavity; a capacitor disposed in the cavity and including a first electrode, a second electrode formed on the first electrode, and a dielectric layer formed between the first electrode and the second electrode; a second insulating layer formed on the first insulating layer and in the cavity to embed the capacitor; circuit layers formed on the first insulating layer and the second insulating layer; and a via penetrating through the second insulating layer to electrically connect the circuit layer to the capacitor.