Abstract: A method for determining a power adjustment component, a terminal, a medium, and a chip are provided. The method includes that: a terminal determines the power adjustment component of a first uplink control channel based on a first code rate, here, the first uplink control channel is used for transmitting multiple uplink control information, the multiple uplink control information corresponding to multiple code rates, and the first code rate is determined based on at least one of the multiple code rates.

Abstract: Provided are a method and apparatus for transmitting uplink feedback information. The method includes: a terminal determines a first PUCCH resource in a first time-domain unit, the first PUCCH resource being configured for carrying multiple SPS HARQ-ACKs, and the multiple SPS HARQ-ACKs including at least one SPS HARQ-ACK in a first SPS HARQ-ACK set and at least one SPS HARQ-ACK in a second SPS HARQ-ACK set; and when the first PUCCH resource is unavailable, the terminal determines whether the first time-domain unit is a time-domain unit for transmitting the first SPS HARQ-ACK set.

Abstract: A dual-probe method for fluorescence quantitative PCR (Polymerase Chain Reaction) is disclosed. The method involves the use of a Taqman dual-probe detection system with the same pair of primers. The dual probes includes a detection probe and a reference probe. The detection probe targets the wild-type sequence at the hotspot mutation site, which can cover multiple adjacent mutations. The reference probe targets the wild-type sequence adjacent to the target sequence. Both probes share the same pair of upstream and downstream primers. This method uses a single reaction qPCR (quantitative PCR) method, which can simultaneously detect multiple adjacent mutations. It effectively saves tissue samples and greatly shortens the testing period. Moreover, the close proximity of the target and reference sequences enhances the reliability and accuracy of the results, making it widely applicable in various fields.

Abstract: A battery pack includes: a housing assembly; plurality of cells disposed in the housing assembly; a circuit board disposed in the housing assembly and connected to the plurality of cells; and at least two electrical terminals connected to the circuit board and configured to be coupled to an apparatus terminal on an external device when the battery pack is connected to the external device. The at least two electrical terminals include a Type-C terminal and a metal terminal fixed on a terminal block, where output power of the Type-C terminal is greater than 65 W, a power device for supplying power to the Type-C terminal is disposed on the circuit board, and the terminal block and the power device are disposed on the same mounting surface of the circuit board.

Abstract: The present invention relates to a transdermal photocuring forming hydrogel with biological activity. The hydrogel can release recombinant collagen with biological activity, the recombinant collagen includes a sequence as shown in SEQ ID No. 1, an amino acid sequence of the recombinant collagen includes N basic repetitive units, and each basic repetitive unit includes n1 of the following characteristic amino acid sequences: “G-Xaa1-Xaa2-G-E-Xaa3”; the 3? end and the 5? end of the basic repetitive unit are connected to form the above characteristic amino acid sequence. The recombinant collagen provided by the present invention has relatively obvious integrin binding activity, and has the effects of promoting cell adhesion, proliferation and differentiation. The hydrogel of the present invention has good biocompatibility and stable quality, which can be cured and formed in situ in a transdermal photo-crosslinking manner after injection, with simple, convenient and controllable operation.

Abstract: The present application discloses a double-sided SiP packaging structure and a manufacturing method thereof, wherein the double-sided SiP packaging structure comprises a substrate, a first packaging structure arranged on the substrate, and a second packaging structure arranged below the substrate; the second packaging structure comprises a chip, interposer and a molding material; a conductive structure array is arranged on an upper surface of the interposer; the interposer is arranged below the substrate through the conductive structure array; a space region among a lower surface of the substrate, the chip and the interposer is filled with the molding material; a conductive bonding pad array is arranged on the lower surface of the interposer; and a groove is formed in a part of region between the conductive bonding pad and an edge contour of the interposer.

Abstract: The present disclosure provides a method for preparing lithium iron phosphate from ferric hydroxyphosphate, including: purifying ferrous sulfate to form a ferrous sulfate solution, adding hydrogen peroxide, phosphoric acid, an ammonium dihydrogen phosphate solution and ammonia water into the ferrous sulfate solution and then reacting to form a mixed slurry, holding the mixed slurry at a temperature for a period of time, and then washing with water and subjecting to press filtration to form ferric hydroxyphosphate precursors with different iron-phosphorus ratios; then flash drying, sintering at a high temperature, and pulverizing to obtain ferric hydroxyphosphate precursors with different iron-phosphorus ratios and different specific surface areas.

Abstract: The invention provides 3D-knitted spacer fabrics of high breathability and moisture management and methods of making the 3D-knitted spacer fabrics. The middle layer of the fabric is made of hydrophilic material, comprising two yarns, a blended thermo-fuse wicking yarn comprising hydrophilic fiber and thermo-fuse fiber, and a non-supportive hydrophilic functional wicking yarn. The top layer of the fabric comprises a hydrophilic yarn, and the third layer of the fabric comprises a hydrophobic yarn. The 3D-knitted spacer fabrics are useful in clothing and equipment for wear in high temperature environments.

Abstract: A circuit check method and an electronic apparatus applicable to a to-be-tested circuit are provided. The to-be-tested circuit has one or more first nodes related to a gate voltage of one or more transistor devices and a plurality of second nodes. The circuit check method includes: setting endpoint voltages of a plurality of input interface ports of the to-be-tested circuit; obtaining a first node voltage of the first node according to a conduction path of the to-be-tested circuit and the gate voltage of the transistor device; obtaining a second node voltage of each second node according to the conduction path, the endpoint voltages, and the first node voltage; and performing circuit static check on the to-be-tested circuit by applying the first node voltage and the second node voltage.

Abstract: The present invention discloses a recombinant collagen protein and its use in the cartilage repair matrix. The present invention discloses a recombinant collagen protein which contains the sequence shown in SEQ ID No. 1; the amino acid sequence of the stated recombinant collagen protein comprises N basic repetitive units; the basic repetitive unit contains n1 amino acid sequences with the following characteristic: G-Xaa1-Xaa2-G-E-Xaa3; the 3? end and the 5? end of the basic repetitive unit are connected to form the amino acid sequence with the above characteristic. The recombinant collagen protein claimed by the present invention has significant integrin binding activity, has the effect of promoting cell adhesion, proliferation, differentiation, and repairing cartilage tissue defects, etc, and it has promising prospects for application.

Abstract: An integrated circuit device includes a gate stack disposed over a substrate. A first L-shaped spacer is disposed along a first sidewall of the gate stack and a second L-shaped spacer is disposed along a second sidewall of the gate stack. The first L-shaped spacer and the second L-shaped spacer include silicon and carbon. A first source/drain epitaxy region and a second source/drain epitaxy region are disposed over the substrate. The gate stack is disposed between the first source/drain epitaxy region and the second source/drain epitaxy region. An interlevel dielectric (ILD) layer disposed over the substrate. The ILD layer is disposed between the first source/drain epitaxy region and a portion of the first L-shaped spacer disposed along the first sidewall of the gate stack and between the second source/drain epitaxy region and a portion of the second L-shaped spacer disposed along the second sidewall of the gate stack.

Abstract: A hierarchical health index evaluation method for an intelligent substation includes: obtaining a basic health index of a device based on static information and dynamic information of the device; obtaining a device correlation based on a communication connection relationship between the device and another device, and correcting the basic health index of the device based on the device correlation to obtain a health index of the device; obtaining a layer-based health index of a layer based on a device health index and a device importance weight of the layer; obtaining a whole-station health index of an intelligent substation based on a layer-based health index of each layer and a sum of device importance weights of each layer; and regulating the intelligent substation based on a health index of each device in the intelligent substation, the layer-based health index of each layer, and the whole-station health index.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: Intelligent process management is provided. A start time is determined for an additional process to be run on a worker node within a duration of a sleep state of a task of a process already running on the worker node by adding a first defined buffer time to a determined start time of the sleep state of the task. A backfill time is determined for the additional process by subtracting a second defined buffer time from a determined end time of the sleep state of the task. A scheduling plan is generated for the additional process based on the start time and the backfill time corresponding to the additional process. The scheduling plan is executed to run the additional process on the worker node according to the start time and the backfill time corresponding to the additional process.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a metal interconnection in the IMD layer, forming a magnetic tunneling junction (MTJ) on the metal interconnection, and performing a trimming process to shape the MTJ. Preferably, the MTJ includes a first slope and a second slope and the first slope is less than the second slope.

Abstract: Disclosed are a display panel and a driving method therefor, and a display device. Two adjacent rows of sub-pixels are taken as a row group, and the row group is provided with a first sub row group and a second sub row group that are arranged in a column direction; a gate electrode of a first transistor in the first sub row group is electrically connected to a first gate line; a gate electrode of a second transistor in the second sub row group is electrically connected to a second gate line; two adjacent sub-pixels in the column direction share one third transistor, and a gate electrode of the third transistor in the row group is electrically connected to a third gate line; and the first transistor and the second transistor in one column of sub-pixels are electrically connected to a data line by means of the shared third transistor.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A system for developing a simulation of a process. In one aspect, a system creates a first model within the simulation. The first model represents a part of the process and comprises a first port to which other models may be connected. The system also creates a second model within the simulation. The second model represents another part of the process and comprises a second port to which other models may be connected. The system then connects the first port and the second port together. Upon connection, the system allocates a memory location as a connection variable that represents a type of information transfer between the first and second ports. A first port variable, which represents a value transferrable through the first port, is set to reference the value at the allocated memory location. Similarly, a second port variable, which represents a value transferrable through the second port, is also set to reference the value at the allocated memory location.

Abstract: The disclosure provides a kit for detecting microsatellite instability and a method therefor. The kit includes a negative control, a plurality of qPCR reaction solutions, a qPCR premix and a sterile enzyme-free water; the plurality of qPCR reaction solutions includes 6 pairs of upstream primers and downstream primers of which the MSI mutation site is amplified, and a reference probe for the internal reference and a detection probe for the mutation site. The difference between the amplification of the gene and the gene at the mutation site of the samples and the negative control is used to detect the microsatellite instability. The method and kit as provided is easy and simple without the need of normal tissues being a control, and the need to open the cap. By doing so, aerosol pollution is avoided and sample supplies are conserved.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.