Patents by Inventor John B. Carter
John B. Carter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240090721Abstract: A robotic cleaner includes a housing, a suction conduit with an opening, and a leading roller mounted in front of a brush roll. An inter-roller air passageway may be defined between the leading roller and the brush roll wherein the lower portion of the leading roller is exposed to a flow path to the suction conduit and an upper portion of the leading roller is outside of the flow path. Optionally, a combing unit includes a plurality of combing protrusions extending into the leading roller and having leading edges not aligned with a center of the leading roller. Optionally, a sealing strip is located along a rear side of the opening and along a portion of left and right sides of the opening. The underside may define side edge vacuum passageways extending from the sides of the housing partially between the leading roller and the sealing strip towards the opening.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Steven Paul CARTER, Adam Udy, Catriona A. Sutter, Christopher Pinches, David S. Clare, Andre David Brown, John Freese, Patrick Cleary, Alexander J. Calvino, Lee Cottrell, Daniel Meyer, Daniel John Innes, David Jalbert, Jason B. Thorne, Peter Hutchinson, Gordon Howes, Wenxiu Gao, David Wu, David W. Poirier, Daniel R. Der Marderosian
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Patent number: 11937429Abstract: Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive levels includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus. In some embodiments the vertically-stacked conductive levels are wordline levels within a NAND memory array. Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. Vertically-stacked NAND memory cells are along the conductive levels within a memory array region. A staircase region is proximate the memory array region. The staircase region has electrical contacts in one-to-one correspondence with the conductive levels. A layer is over the memory array region and over the staircase region. The layer includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus.Type: GrantFiled: December 20, 2021Date of Patent: March 19, 2024Assignee: Micron Technology, Inc.Inventors: Justin B. Dorhout, Fei Wang, Chet E. Carter, Ian Laboriante, John D. Hopkins, Kunal Shrotri, Ryan Meyer, Vinayak Shamanna, Kunal R. Parekh, Martin C. Roberts, Matthew Park
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Patent number: 11314579Abstract: A processor may receive information about one or more environmental factors. The processor may predict, based on the one or more environmental factors, that a particular datacenter in a distributed computing environment will experience elevated bit-flip error rates during a certain time period. The processor may select, based on the predicted elevated bit-flip error rates, one or more specific applications in the particular datacenter to be protected. The processor may protect the selected one or more specific applications during the certain time period of the predicted elevated bit-flip rates.Type: GrantFiled: September 3, 2019Date of Patent: April 26, 2022Assignee: International Business Machines CorporationInventors: HariGovind Venkatraj Ramasamy, John B. Carter
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Publication number: 20210064459Abstract: A processor may receive information about one or more environmental factors. The processor may predict, based on the one or more environmental factors, that a particular datacenter in a distributed computing environment will experience elevated bit-flip error rates during a certain time period. The processor may select, based on the predicted elevated bit-flip error rates, one or more specific applications in the particular datacenter to be protected. The processor may protect the selected one or more specific applications during the certain time period of the predicted elevated bit-flip rates.Type: ApplicationFiled: September 3, 2019Publication date: March 4, 2021Inventors: HariGovind Venkatraj Ramasamy, John B. Carter
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Patent number: 10009236Abstract: Mechanisms are provided for determining an event rate. The mechanisms sample a sequence of events to generate a set of sampled events. At least a subset of the sampled events have associated event sequence values indicating a position of the sampled event within the sequence of events. The mechanisms group the sampled events into a plurality of event groups based on a common characteristic of the events. The mechanisms determine, for each event group, sequence values of sampled events associated with the event group. The mechanisms calculate, for each event group, an estimated event rate based on the sequence values of the sampled events associated with the event group and the total number of events in the sequence of events.Type: GrantFiled: June 8, 2016Date of Patent: June 26, 2018Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Patent number: 9893962Abstract: Mechanisms are provided for analyzing data traffic through a network. The mechanisms sample data packets of a data flow through a normal port of a network forwarding device of the network. The sampling is performed at least by configuring the network forwarding device to implement port mirroring of the normal port to a designated mirror port of the network forwarding device. The mechanisms forward sampled data packets, copied to the mirror port by virtue of the port mirroring, to a collector computing device. The mechanisms process, by the collector computing device, the sampled data packets to analyze the data flow through the normal port of the network forwarding device. The mechanisms perform, by the collector computing device, an operation based on results of the analysis.Type: GrantFiled: October 9, 2015Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Patent number: 9665346Abstract: Mechanisms are provided for performing a floating point arithmetic operation in a data processing system. A plurality of floating point operands of the floating point arithmetic operation are received and bits in a mantissa of at least one floating point operand of the plurality of floating point operands are shifted. One or more bits of the mantissa that are shifted outside a range of bits of the mantissa of at least one floating point operand are stored and a vector value is generated based on the stored one or more bits of the mantissa that are shifted outside of the range of bits of the mantissa of the at least one floating point operand. A resultant value is generated for the floating point arithmetic operation based on the vector value and the plurality of floating point operands.Type: GrantFiled: October 28, 2014Date of Patent: May 30, 2017Assignee: International Business Machines CorporationInventors: John B. Carter, Bruce G. Mealey, Karthick Rajamani, Eric E. Retter, Jeffrey A. Stuecheli
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Patent number: 9634938Abstract: An approach is provided in which a first virtual machine, executing on a host computer system, generates a data packet with a target destination at a second virtual machine over a computer network. The host computer system identifies a data flow corresponding to the data packet based the data packet's header information, and analyzes path weightings of available paths that are made available to the identified data flow. In turn, the host computer system assigns one of the available paths to the identified data flow corresponding to a pre-defined physical layer path from the first virtual machine to the second virtual machine.Type: GrantFiled: November 5, 2013Date of Patent: April 25, 2017Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon
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Publication number: 20160294647Abstract: Mechanisms are provided for determining an event rate. The mechanisms sample a sequence of events to generate a set of sampled events. At least a subset of the sampled events have associated event sequence values indicating a position of the sampled event within the sequence of events. The mechanisms group the sampled events into a plurality of event groups based on a common characteristic of the events. The mechanisms determine, for each event group, sequence values of sampled events associated with the event group. The mechanisms calculate, for each event group, an estimated event rate based on the sequence values of the sampled events associated with the event group and the total number of events in the sequence of events.Type: ApplicationFiled: June 8, 2016Publication date: October 6, 2016Inventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Patent number: 9401853Abstract: Mechanisms are provided for determining an event rate. The mechanisms sample a sequence of events to generate a set of sampled events. At least a subset of the sampled events have associated event sequence values indicating a position of the sampled event within the sequence of events. The mechanisms group the sampled events into a plurality of event groups based on a common characteristic of the events. The mechanisms determine, for each event group, sequence values of sampled events associated with the event group. The mechanisms calculate, for each event group, an estimated event rate based on the sequence values of the sampled events associated with the event group and the total number of events in the sequence of events.Type: GrantFiled: September 24, 2013Date of Patent: July 26, 2016Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Publication number: 20160212055Abstract: At an application at a sender system, when an amount of data to be transmitted from the sender exceeds a flow size threshold, the data is divided into a set of chunks of a size. According to a mapping selection rule, a subset is selected from a set of selected label mappings, wherein each label mapping in the subset maps an original label in the data to a different virtual label. For a chunk, when by routing the chunk to a first networking component corresponding to a first virtual label a fraction of the amount of data that will have been routed to the first component will exceed a mapping threshold, the original label in the chunk is replaced with a second virtual label from a second label mapping in the subset. The chunk is routed to a second networking component corresponding to the second virtual label.Type: ApplicationFiled: January 21, 2015Publication date: July 21, 2016Applicant: International Business Machines CorporationInventors: KANAK B. AGARWAL, John B. Carter, Wesley M. Felter, Keqiang He, Eric J. Rozner
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Patent number: 9350607Abstract: Mechanisms are provided for configuring a data flow between a source device and a destination device in a network. The mechanisms receive, from a network control application, a request to establish a network configuration corresponding to a data flow between the source device and the destination device. The request comprises a fine grained header field tuple for defining the data flow. The mechanisms allocate, from a shadow address pool, a shadow address to be mapped to the fine grained header field tuple. The shadow address pool comprises addresses not being used by devices coupled to the network. The mechanisms configure a network infrastructure of the network to route data packets of the data flow from the source device to the destination device based on the shadow address.Type: GrantFiled: September 25, 2013Date of Patent: May 24, 2016Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Wesley M. Felter, Brent E. Stephens
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Publication number: 20160036659Abstract: Mechanisms are provided for analyzing data traffic through a network. The mechanisms sample data packets of a data flow through a normal port of a network forwarding device of the network. The sampling is performed at least by configuring the network forwarding device to implement port mirroring of the normal port to a designated mirror port of the network forwarding device. The mechanisms forward sampled data packets, copied to the mirror port by virtue of the port mirroring, to a collector computing device. The mechanisms process, by the collector computing device, the sampled data packets to analyze the data flow through the normal port of the network forwarding device. The mechanisms perform, by the collector computing device, an operation based on results of the analysis.Type: ApplicationFiled: October 9, 2015Publication date: February 4, 2016Inventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Patent number: 9203711Abstract: Mechanisms are provided for analyzing data traffic through a network. The mechanisms sample data packets of a data flow through a normal port of a network forwarding device of the network. The sampling is performed at least by configuring the network forwarding device to implement port mirroring of the normal port to a designated mirror port of the network forwarding device. The mechanisms forward sampled data packets, copied to the mirror port by virtue of the port mirroring, to a collector computing device. The mechanisms process, by the collector computing device, the sampled data packets to analyze the data flow through the normal port of the network forwarding device. The mechanisms perform, by the collector computing device, an operation based on results of the analysis.Type: GrantFiled: September 24, 2013Date of Patent: December 1, 2015Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon, Jeffrey T. Rasley
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Patent number: 9146597Abstract: A mechanism is provided for minimizing system power in the data processing system with fast convergence. A current aggregate system power value is determined using a current thermal threshold value. For each potential thermal threshold value in a set of potential thermal threshold values, a determination is made as to whether there is a potential thermal threshold value that results in a potential aggregate system power value that is lower than the current aggregate system power value. Responsive to identifying an optimal potential thermal threshold value from the set of potential thermal threshold values that results in minimum aggregate system power value that is lower than the current aggregate system power value, the optimal potential thermal threshold value is set as a new thermal threshold value.Type: GrantFiled: September 10, 2012Date of Patent: September 29, 2015Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, John B. Carter, Wei Huang, Charles R. Lefurgy, Guillermo J. Silva
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Patent number: 9141159Abstract: A mechanism is provided for minimizing system power in the data processing system with fast convergence. A current aggregate system power value is determined using a current thermal threshold value. For each potential thermal threshold value in a set of potential thermal threshold values, a determination is made as to whether there is a potential thermal threshold value that results in a potential aggregate system power value that is lower than the current aggregate system power value. Responsive to identifying an optimal potential thermal threshold value from the set of potential thermal threshold values that results in minimum aggregate system power value that is lower than the current aggregate system power value, the optimal potential thermal threshold value is set as a new thermal threshold value.Type: GrantFiled: November 3, 2011Date of Patent: September 22, 2015Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, John B. Carter, Wei Huang, Charles R. Lefurgy, Guillermo J. Silva
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Patent number: 9112794Abstract: A mechanism is provided in a logically centralized controller for dynamic multipath forwarding in a software defined network. The mechanism identifies a set of multiple forwarding paths for a flow. The mechanism assigns a virtual destination address for each multiple forwarding path in the set of multiple forwarding paths. The mechanism installs virtual destination address based forwarding rules in switches for each multiple forwarding path and installs rewriting rules in an egress switch for all paths in the set of multiple forwarding paths. Each rewriting rule rewrites one of the virtual destination address to the real destination address. The mechanism configures an ingress switch to dynamically select a path from the set of multiple forwarding paths based on a multipath policy and rewrite the destination address from the real destination address to a virtual destination address corresponding to the selected path.Type: GrantFiled: November 5, 2013Date of Patent: August 18, 2015Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon
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Publication number: 20150124812Abstract: A mechanism is provided in a logically centralized controller for dynamic multipath forwarding in a software defined network. The mechanism identifies a set of multiple forwarding paths for a flow. The mechanism assigns a virtual destination address for each multiple forwarding path in the set of multiple forwarding paths. The mechanism installs virtual destination address based forwarding rules in switches for each multiple forwarding path and installs rewriting rules in an egress switch for all paths in the set of multiple forwarding paths. Each rewriting rule rewrites one of the virtual destination address to the real destination address. The mechanism configures an ingress switch to dynamically select a path from the set of multiple forwarding paths based on a multipath policy and rewrite the destination address from the real destination address to a virtual destination address corresponding to the selected path.Type: ApplicationFiled: November 5, 2013Publication date: May 7, 2015Applicant: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon
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Publication number: 20150124608Abstract: An approach is provided in which a first virtual machine, executing on a host computer system, generates a data packet with a target destination at a second virtual machine over a computer network. The host computer system identifies a data flow corresponding to the data packet based the data packet's header information, and analyzes path weightings of available paths that are made available to the identified data flow. In turn, the host computer system assigns one of the available paths to the identified data flow corresponding to a pre-defined physical layer path from the first virtual machine to the second virtual machine.Type: ApplicationFiled: November 5, 2013Publication date: May 7, 2015Applicant: International Business Machines CorporationInventors: Kanak B. Agarwal, John B. Carter, Colin K. Dixon
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Patent number: 9007962Abstract: An aspect includes deadlock-free routing on arbitrary network topologies using edge-disjoint sub-networks. A network topology of a network is identified. The network includes a plurality of links between a plurality of switches. Each of the links is identified as an edge. A plurality of edge-disjoint sub-networks is constructed from the network topology of the network by routing configuration logic. The plurality of edge-disjoint sub-networks is formed by edges between the switches such that the edges are disjoint relative to each of the edge-disjoint sub-networks. The switches are configured to route traffic on the network with each route staying entirely within one of the plurality of edge-disjoint sub-networks within the network.Type: GrantFiled: January 24, 2013Date of Patent: April 14, 2015Assignee: International Business Machines CorporationInventors: John B. Carter, Colin K. Dixon, Wesley M. Felter, Ankit Singla