Patents by Inventor John B. Carter
John B. Carter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8364889Abstract: A mechanism is provided for dynamic row-width memory. The memory adapts row width to usage based on memory controller and memory management system software control. The mechanism uses an organization and control of memory array access logic. The memory controller may receive an explicit command using existing column address lines or using a command line into the memory controller. In a first option, the memory controller receives a row width and disables the unused columns and turns off the unused sense amps. In a second option, the memory controller receives a row width and adjusts row count, keeping the number of active cells constant. In a third option, the memory controller receives a row width and adjusts a number of banks.Type: GrantFiled: May 28, 2010Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: John B. Carter, Karthick Rajamani
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Patent number: 8358503Abstract: A modular processing module is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors coupled to the circuit board, and a plurality of processing nodes coupled to the circuit board. Each processing module side in the set of processing module sides couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system.Type: GrantFiled: May 28, 2010Date of Patent: January 22, 2013Assignee: International Business Machines CorporationInventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Wesley M. Felter, Madhusudan K. Iyengar, Thomas W. Keller, Jr., Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
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Publication number: 20120245738Abstract: A mechanism is provided for minimizing aggregate power from HVAC cooling and IT equipment in a data center. The mechanism selects a high HVAC set point for low-utilization and selects a low HVAC set point for high utilization. For each cooling zone in a data center, the mechanism monitors the average utilization of equipment in the cooling zone and selects the appropriate HVAC set point based on utilization. The mechanism may determine efficiency to determine whether to adjust universal HVAC set points or the HVAC set points for each given cooling zone. That is, the mechanism may dynamically adjust HVAC set points for optimal efficiency. Alternatively, the mechanism may go beyond binary control and compute actual data center efficiency metrics to decide on intermediate set points.Type: ApplicationFiled: March 23, 2011Publication date: September 27, 2012Applicant: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, John B. Carter, Hendrik F. Hamann, Wei Huang, Thomas W. Keller, JR., Juan C. Rubio
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Patent number: 8261112Abstract: A method, system, and computer program product for optimizing power consumption of an executing processor executing. The method includes determining a first sensitivity relationship (SR) based on a first and a second performance metric value (PMV) measured at a first and second operating frequency (OF), respectively. The first SR predicts workload performance over a range of OFs. A third OF is determined based on the first SR and a specified workload performance floor. A third PMV is measured by executing the processor operating at the third OF. A second SR based on the second and third PMVs is then determined. The first and second SRs are logically combined to generate a third SR. Based on the third SR, a fourth OF is outputted.Type: GrantFiled: December 8, 2008Date of Patent: September 4, 2012Assignee: International Business Machines CorporationInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Patent number: 8250395Abstract: A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the data processing system. The utilization slack value is determined using one or more active core count values and one or more slack core count values. The control system computes a new utilization metric to be a difference between a full utilization value and the utilization slack value. The control system determines whether the new utilization metric is below a predetermined utilization threshold. Responsive to the new utilization metric being below the predetermined utilization threshold, the control system decreases a frequency of the plurality of processors.Type: GrantFiled: November 12, 2009Date of Patent: August 21, 2012Assignee: International Business Machines CorporationInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Todd J. Rosedahl, Malcolm S. Ware
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Publication number: 20120210149Abstract: A technique for performing storage power management on storage subsystems includes measuring, using a power measurement device, power consumption of a storage subsystem. A first average power and a second average power for the storage subsystem are calculated based on the measured power consumption. In this case, the first average power is calculated over a shorter time period than the second average power. One or more first actuators are incremented in response to the first average power of the storage subsystem being greater than a first power level to reduce the first average power of the storage subsystem below the first power level within a first time period. One or more second actuators are incremented in response to the second average power of the storage subsystem being greater than a second power level and less than the first power level to reduce the second average power of the storage subsystem below the second power level within a second time period that is greater than the first time period.Type: ApplicationFiled: February 10, 2011Publication date: August 16, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: JOHN B. CARTER, WESLEY M. FELTER, ANTHONY N. HYLICK, MALCOLM S. WARE
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Publication number: 20120140355Abstract: A token value is maintained based on an allowable number of low power transitions of a hard disk drive without adversely affecting reliability, compared to an actual number of low power transitions of said hard disk drive. The allowable number of low power transitions increases over the hard disk drive's lifetime. Before the hard disk drive performs a low power transition, the token is evaluated to determine if the hard disk drive is allowed to perform a low power transition. Low power transitions discussed include parking the head and spinning-down the hard disk drive.Type: ApplicationFiled: December 7, 2010Publication date: June 7, 2012Applicant: International Business Machine CorporationInventors: John B. Carter, Wesley M. Felter, Anthony N. Hylick
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Patent number: 8179674Abstract: A scalable space-optimized and energy-efficient computing system is provided. The computing system comprises a plurality of modular compartments in at least one level of a frame configured in a hexadron configuration. The computing system also comprises an air inlet, an air mixing plenum, and at least one fan. In the computing system the plurality of modular compartments are affixed above the air inlet, the air mixing plenum is affixed above the plurality of modular compartments, and the at least one fan is affixed above the air mixing plenum. When at least one module is inserted into one of the plurality of modular compartments, the module couples to a backplane within the frame.Type: GrantFiled: May 28, 2010Date of Patent: May 15, 2012Assignee: International Business Machines CorporationInventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Madhusudan K. Iyengar, Thomas W. Keller, Jr., Jian Li, Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
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Publication number: 20120054374Abstract: According to one aspect of the present disclosure a method and technique for monitoring memory access is disclosed. The method includes monitoring access to a memory unit, updating an activity cache associated with an incrementor with access data corresponding to accesses to the memory unit, monitoring a rate of access to the memory unit, adjusting a sample rate of the access data for storage in the memory unit based on the rate of access, and scaling a value of the access data based on the sample rate.Type: ApplicationFiled: August 26, 2010Publication date: March 1, 2012Applicant: International Business Machines CorporationInventors: John B. Carter, Karthick Rajamani, Gregory S. Still, Jeffrey A. Stuecheli, Malcom S. Ware
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Publication number: 20120005513Abstract: A performance control technique for a processing system that includes one or more adaptively-clocked processor cores provides improved performance/power characteristics. An outer feedback loop adjusts the power supply voltage(s) provided to the power supply voltage domain(s) powering the core(s), which may be on a per-core basis or include multiple cores per voltage domain. The outer feedback loop operates to ensure that each core is meeting specified performance, while the cores also include an inner feedback loop that adjusts their processor clock or other performance control mechanism to maximize performance under present operating conditions and within a margin of safety. The performance of each core is measured and compared to a target performance. If the target performance is not met for each core in a voltage domain, the voltage is raised for the voltage domain until all cores meet the target performance.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bishop C. Brock, John B. Carter, Alan J. Drake, Michael S. Floyd, Charles R. Lefurgy, Malcolm S. Ware
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Publication number: 20110292597Abstract: A modular processing module is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors coupled to the circuit board, and a plurality of processing nodes coupled to the circuit board. Each processing module side in the set of processing module sides couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system.Type: ApplicationFiled: May 28, 2010Publication date: December 1, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Wesley M. Felter, Madhusudan K. Iyengar, Thomas W. Keller, JR., Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
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Publication number: 20110296149Abstract: Mechanisms are provided for processing an instruction in a processor of a data processing system. The mechanisms operate to receive, in a processor of the data processing system, an instruction, the instruction including power/performance tradeoff information associated with the instruction. The mechanisms further operate to determine power/performance tradeoff priorities or criteria, specifying whether power conservation or performance is prioritized with regard to execution of the instruction, based on the power/performance tradeoff information. Moreover, the mechanisms process the instruction in accordance with the power/performance tradeoff priorities or criteria identified based on the power/performance tradeoff information of the instruction.Type: ApplicationFiled: May 27, 2010Publication date: December 1, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Carter, Jian Li, Karthick Rajamani, William E. Speight, Lixin Zhang
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Publication number: 20110296118Abstract: A mechanism is provided for dynamic row-width memory. The memory adapts row width to usage based on memory controller and memory management system software control. The mechanism uses an organization and control of memory array access logic. The memory controller may receive an explicit command using existing column address lines or using a command line into the memory controller. In a first option, the memory controller receives a row width and disables the unused columns and turns off the unused sense amps. In a second option, the memory controller receives a row width and adjusts row count, keeping the number of active cells constant. In a third option, the memory controller receives a row width and adjusts a number of banks.Type: ApplicationFiled: May 28, 2010Publication date: December 1, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Karthick Rajamani
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Publication number: 20110292594Abstract: A scalable space-optimized and energy-efficient computing system is provided. The computing system comprises a plurality of modular compartments in at least one level of a frame configured in a hexadron configuration. The computing system also comprises an air inlet, an air mixing plenum, and at least one fan. In the computing system the plurality of modular compartments are affixed above the air inlet, the air mixing plenum is affixed above the plurality of modular compartments, and the at least one fan is affixed above the air mixing plenum. When at least one module is inserted into one of the plurality of modular compartments, the module couples to a backplane within the frame.Type: ApplicationFiled: May 28, 2010Publication date: December 1, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Wael R. El-Essawy, Elmootazbellah N. Elnozahy, Madhusudan K. Iyengar, Thomas W. Keller, JR., Jian Li, Karthick Rajamani, Juan C. Rubio, William E. Speight, Lixin Zhang
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Publication number: 20110231030Abstract: A mechanism is provided for minimizing system power in a data processing system. A management control unit determines whether a convergence has been reached in the data processing system. If convergence fails to be reached, the management control unit determines whether a maximum fan flag is set to indicate that a fan is operating at a maximum speed. Responsive to the maximum fan flag failing to be set, a thermal threshold of the data processing system is either increased or decreased and thereby a fan speed of the data processing system is either increased or decreased based on whether the system power of the data processing system has either increased or decreased and based on whether a temperature of the data processing system has either increased or decreased. Thus, a new thermal threshold and a new fan speed are formed. The process is then repeated until convergence has been met.Type: ApplicationFiled: March 18, 2010Publication date: September 22, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Carter, Elmootazbellah N. Elnozahy, Malcolm S. Ware, Wei Huang
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Publication number: 20110178652Abstract: A mechanism is provided for dynamically power capping one or more units. A power capping mechanism sets a counter value corresponding to an initial energy budget assigned to a unit for a given interval. Responsive to the unit receiving an operation to perform during the given interval, the power capping mechanism decrements the counter value by a decrement value. Responsive to the given interval expiring, the power capping mechanism sends the counter value to a power control loop in the data processing system, receives a new energy budget from the power control loop, and resets the counter value to a value corresponding to the new energy budget assigned to the unit for a next interval.Type: ApplicationFiled: January 15, 2010Publication date: July 21, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Malcolm S. Ware
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Publication number: 20110113270Abstract: A mechanism is provided for controlling operational parameters associated with a plurality of processors. A control system in the data processing system determines a utilization slack value of the data processing system. The utilization slack value is determined using one or more active core count values and one or more slack core count values. The control system computes a new utilization metric to be a difference between a full utilization value and the utilization slack value. The control system determines whether the new utilization metric is below a predetermined utilization threshold. Responsive to the new utilization metric being below the predetermined utilization threshold, the control system decreases a frequency of the plurality of processors.Type: ApplicationFiled: November 12, 2009Publication date: May 12, 2011Applicant: International Business Machines CorporationInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Todd J. Rosedahl, Malcolm S. Ware
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Publication number: 20100146316Abstract: A method, system, and computer program product for optimizing power consumption of an executing processor executing. The method includes determining a first sensitivity relationship (SR) based on a first and a second performance metric value (PMV) measured at a first and second operating frequency (OF), respectively. The first SR predicts workload performance over a range of OFs. A third OF is determined based on the first SR and a specified workload performance floor. A third PMV is measured by executing the processor operating at the third OF. A second SR based on the second and third PMVs is then determined. The first and second SRs are logically combined to generate a third SR. Based on the third SR, a fourth OF is outputted.Type: ApplicationFiled: December 8, 2008Publication date: June 10, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: John B. Carter, Heather L. Hanson, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20080256090Abstract: In a network of computer nodes, a directory service provides both the physical location of directory information around the network and the directory information itself in a single data structure. This single data structure is distributed throughout the network, and continuously redistributed, so as to create a directory service that is both more flexible, and more robust, than prior art directory services.Type: ApplicationFiled: June 23, 2008Publication date: October 16, 2008Applicant: MANGOSOFT CORPORATIONInventors: Daniel J. Dietterich, Robert S. Phillips, John B. Carter, Scott H. Davis, Steven J. Frank, William Abraham
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Publication number: 20040117410Abstract: In a network of computer nodes, a directory service provides both the physical location of directory information around the network and the directory information itself in a single data structure.Type: ApplicationFiled: November 7, 2003Publication date: June 17, 2004Inventors: Daniel J. Dietterich, Robert S. Phillips, John B. Carter, Scott H. Davis, Steven J. Frank, William Abraham