Patents by Inventor John E. Jenne

John E. Jenne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9547359
    Abstract: An information handling system includes a processor, a controller hub, a shared higher bandwidth path coupling the processor to the controller hub, and an exclusive lower bandwidth path coupling the processor to the controller hub. The processor communicates system management information over the bandwidth path in response to a first set of criteria and communicates the information over the lower bandwidth path in response to the second set of criteria.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: January 17, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: John E. Jenne, Vijay Nijhawan
  • Publication number: 20160357234
    Abstract: A voltage regulator may be tuned to reduce consumption of electrical power. An installed configuration of a dual inline memory module is used to load test the voltage regulator. Results of the load test may then reveal tuning parameters that make the voltage regulator more efficient.
    Type: Application
    Filed: June 3, 2015
    Publication date: December 8, 2016
    Inventors: Shiguo Luo, Ralph H. Johnson, III, John E. Jenne
  • Patent number: 9436256
    Abstract: A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 6, 2016
    Assignee: Dell Products L.P.
    Inventor: John E. Jenne
  • Publication number: 20160231802
    Abstract: A method and apparatus for system control of a central processing unit (CPU) maximum power detector are provided. in accordance with at least one embodiment, a decision is made as to whether a response of a maximum power detector of the CPU is to be altered. When the response is to be altered, a modified input level is provided to the maximum power detector to alter the response. As an example, the modified input level can prevent the maximum power detector from triggering a power throttling function. When the response is not to be altered, an existing input level for the maximum power detector is maintained. In accordance with at least one embodiment, an apparatus or information handling system can comprise a voltage regulator (VR), a current sensor, a CPU comprising a maximum power detector, and a digital to analog converter (DAC).
    Type: Application
    Filed: February 11, 2015
    Publication date: August 11, 2016
    Inventors: John E. Jenne, Shawn J. Dube, Sandor Farkas
  • Patent number: 9274581
    Abstract: An information handling system determines a system configuration including a hardware module, and determines an adjusted power budget for the hardware module. The adjusted power budget is based on a calculation including a difference between a date code read from the hardware module and a baseline date, a baseline power budget, a power reduction period and a power reduction interval. The calculation may optionally include a risk factor. In alternate embodiments, an adjusted power budget for a hardware module may be calculated by an order processing system for information handling systems, or by a planning tool for a data center which contains information handling systems.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: March 1, 2016
    Assignee: Dell Products, LP
    Inventors: Stuart Allen Berke, John E. Jenne
  • Patent number: 9261945
    Abstract: A computer-implemented method dynamically limits peak power consumption in processing nodes of an IHS. A power management micro-controller receives processing node-level power-usage and workload data from several node controllers, including current power consumption and a current workload, for each processing node within the IHS. A total available system power of the IHS is identified including a peak power output capacity and a sustained output power capacity. At least one node peak power threshold is determined based on the power-usage and workload data for each of the processing nodes. The node controllers are triggered to determine and set a central processing unit (CPU) peak power limit for each of several CPUs within each of the processing nodes based on the node peak power threshold, wherein each of the CPUs dynamically adjusts an operating frequency based on the CPU peak power limit.
    Type: Grant
    Filed: August 2, 2015
    Date of Patent: February 16, 2016
    Assignee: Dell Products, L.P.
    Inventors: Mukund P. Khatri, Binay A. Kuruvila, John E. Jenne
  • Publication number: 20160018875
    Abstract: An information handling system includes a processor, a controller hub, a shared higher bandwidth path coupling the processor to the controller hub, and an exclusive lower bandwidth path coupling the processor to the controller hub. The processor communicates system management information over the bandwidth path in response to a first set of criteria and communicates the information over the lower bandwidth path in response to the second set of criteria.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: John E. Jenne, Vijay Nijhawan
  • Publication number: 20160018833
    Abstract: A voltage regulator calibrator analyzes voltage regulator output and compares the output with known electrical loads. The calibrator selects a known electrical load, applies the known electrical load to a voltage regulator, receives from the voltage regulator measured output power characteristics of the voltage regulator, compares the known electrical load with the measured output power characteristics, and generates a voltage regulator adjustment value based on the compared values. Embodiments of the present disclosure also include a method for calibrating, the method including selecting a known electrical load, applying the known electrical load to a voltage regulator, receiving measured output power characteristics of the voltage regulator, comparing the known electrical load with the measured output power characteristics, and generating a voltage regulator adjustment value based on the compared values.
    Type: Application
    Filed: July 17, 2014
    Publication date: January 21, 2016
    Applicant: DELL PRODUCTS, L.P.
    Inventors: George G. Richards, III, Abey K. Mathew, John E. Jenne, Ralph H. Johnson, III
  • Publication number: 20160020641
    Abstract: A wireless charging module includes an antenna and a wireless charger module. An enclosure is configured to fit at least partially within an optical drive bay of an information handling system. The antenna is disposed within a plastic lower portion of the enclosure. The plastic lower portion of the enclosure is configured to enable the antenna to wirelessly receive power from a wireless charging pad. The wireless charger module is disposed within the enclosure, and is configured to provide power to the information handling system.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: John E. Jenne, Vijay Nijhawan
  • Publication number: 20150338896
    Abstract: A computer-implemented method dynamically limits peak power consumption in processing nodes of an IHS. A power management micro-controller receives processing node-level power-usage and workload data from several node controllers, including current power consumption and a current workload, for each processing node within the IHS. A total available system power of the IHS is identified including a peak power output capacity and a sustained output power capacity. At least one node peak power threshold is determined based on the power-usage and workload data for each of the processing nodes. The node controllers are triggered to determine and set a central processing unit (CPU) peak power limit for each of several CPUs within each of the processing nodes based on the node peak power threshold, wherein each of the CPUs dynamically adjusts an operating frequency based on the CPU peak power limit.
    Type: Application
    Filed: August 2, 2015
    Publication date: November 26, 2015
    Applicant: DELL PRODUCTS, L.P.
    Inventors: MUKUND P. KHATRI, BINAY A. KURUVILA, JOHN E. JENNE
  • Publication number: 20150331471
    Abstract: An IHS configuration system includes a plurality of IHS components including a processor system having a first maximum load current. A power system controller is coupled to the plurality of IHS components and operable to couple to a power supply. The power system controller is operable to retrieve a power output limit of the power system and determine a first system power budget for the plurality of IHS components using the first maximum load current of the processor system. The power system controller then determines whether the first system power budget exceeds the power output limit and, in response to the first system power budget exceeding the power output limit, the power system controller provides a second maximum load current for the processor system to create a second system power budget that does not exceed the power output limit.
    Type: Application
    Filed: July 27, 2015
    Publication date: November 19, 2015
    Inventor: John E. Jenne
  • Publication number: 20150277546
    Abstract: A power excursion warning system includes a power system having a first slew rate. A powered component is coupled to the power system. The powered component voltage regulator has a second slew rate that is greater than the first slew rate. A powered component voltage regulator is coupled to the powered component and operable to convert a first voltage received from the power system to a second voltage that is supplied to the powered component. A power excursion warning device is coupled to the powered component voltage regulator and operable to receive a signal from the powered component voltage regulator that is associated with the second slew rate, determine that the signal indicates a power excursion that will result in the power system operating outside a predetermined range, and produce a warning signal indicative of the power excursion.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventor: John E. Jenne
  • Patent number: 9146599
    Abstract: An information handling system includes a processor, a controller hub, a shared higher bandwidth path coupling the processor to the controller hub, and an exclusive lower bandwidth path coupling the processor to the controller hub. The processor communicates system management information over the bandwidth path in response to a first set of criteria and communicates the information over the lower bandwidth path in response to the second set of criteria.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: September 29, 2015
    Assignee: Dell Products, LP
    Inventors: John E. Jenne, Vijay Nijhawan
  • Patent number: 9098277
    Abstract: An IHS configuration system includes a plurality of IHS components including a processor system having a first maximum load current. A power system controller is coupled to the plurality of IHS components and operable to couple to a power supply. The power system controller is operable to retrieve a power output limit of the power system and determine a first system power budget for the plurality of IHS components using the first maximum load current of the processor system. The power system controller then determines whether the first system power budget exceeds the power output limit and, in response to the first system power budget exceeding the power output limit, the power system controller provides a second maximum load current for the processor system to create a second system power budget that does not exceed the power output limit.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: August 4, 2015
    Assignee: Dell Products L.P.
    Inventor: John E. Jenne
  • Patent number: 9075595
    Abstract: A power excursion warning system includes a power system having a first slew rate. A powered component is coupled to the power system. The powered component voltage regulator has a second slew rate that is greater than the first slew rate. A powered component voltage regulator is coupled to the powered component and operable to convert a first voltage received from the power system to a second voltage that is supplied to the powered component. A power excursion warning device is coupled to the powered component voltage regulator and operable to receive a signal from the powered component voltage regulator that is associated with the second slew rate, determine that the signal indicates a power excursion that will result in the power system operating outside a predetermined range, and produce a warning signal indicative of the power excursion.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: July 7, 2015
    Assignee: Dell Products L.P.
    Inventor: John E. Jenne
  • Publication number: 20150100805
    Abstract: A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling.
    Type: Application
    Filed: December 10, 2014
    Publication date: April 9, 2015
    Inventor: John E. Jenne
  • Patent number: 8924750
    Abstract: A voltage regulator phase shedding system includes one or more subsystems to receive a system management interrupt (SMI), gather processor utilization information, determine whether to adjust a performance state, lookup voltage regulator information for new performance state, adjust active voltage regulator phase, and adjust performance state. The voltage regulator phase shedding system can also include one or more subsystems to read a power measurement, calculate throttling requirements, determine whether to adjust a throttling, lookup voltage regulator information for new performance state capacity, adjust active voltage regulator phase, and adjust throttling.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: December 30, 2014
    Assignee: Dell Products L.P.
    Inventor: John E. Jenne
  • Publication number: 20140380069
    Abstract: An information handling system determines a system configuration including a hardware module, and determines an adjusted power budget for the hardware module. The adjusted power budget is based on a calculation including a difference between a date code read from the hardware module and a baseline date, a baseline power budget, a power reduction period and a power reduction interval. The calculation may optionally include a risk factor. In alternate embodiments, an adjusted power budget for a hardware module may be calculated by an order processing system for information handling systems, or by a planning tool for a data center which contains information handling systems.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Stuart Allen Berke, John E. Jenne
  • Publication number: 20140344595
    Abstract: An information handling system includes a processor, a controller hub, a shared higher bandwidth path coupling the processor to the controller hub, and an exclusive lower bandwidth path coupling the processor to the controller hub. The processor communicates system management information over the bandwidth path in response to a first set of criteria and communicates the information over the lower bandwidth path in response to the second set of criteria.
    Type: Application
    Filed: May 20, 2013
    Publication date: November 20, 2014
    Applicant: DELL PRODUCTS, LP
    Inventors: John E. Jenne, Vijay Nijhawan
  • Publication number: 20140068311
    Abstract: A power excursion warning system includes a power system having a first slew rate. A powered component is coupled to the power system. The powered component voltage regulator has a second slew rate that is greater than the first slew rate. A powered component voltage regulator is coupled to the powered component and operable to convert a first voltage received from the power system to a second voltage that is supplied to the powered component. A power excursion warning device is coupled to the powered component voltage regulator and operable to receive a signal from the powered component voltage regulator that is associated with the second slew rate, determine that the signal indicates a power excursion that will result in the power system operating outside a predetermined range, and produce a warning signal indicative of the power excursion.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 6, 2014
    Applicant: Dell Products L.P.
    Inventor: John E. Jenne