Patents by Inventor John Hautala
John Hautala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11404278Abstract: An optical grating component may include a substrate, and an optical grating, the optical grating being disposed on the substrate. The optical grating may include a plurality of angled structures, disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate, wherein the plurality of angled structures are arranged to define a variable depth along a first direction, the first direction being parallel to the plane of the substrate.Type: GrantFiled: September 22, 2020Date of Patent: August 2, 2022Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: John Hautala, Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph C. Olson
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Publication number: 20220190141Abstract: Disclosed herein are methods for forming MOSFETs. In some embodiments, a method may include providing a device structure including a plurality of trenches, forming a gate spacer layer over the device structure, and removing the gate spacer layer from a top surface of the device structure and from a first section of each of the plurality of trenches, wherein a portion of the gate spacer layer remains along a second section of each of the plurality of trenches. The method may further include forming a gate oxide layer along the first section of each of the plurality of trenches and along the portion of the gate spacer layer.Type: ApplicationFiled: December 11, 2020Publication date: June 16, 2022Applicant: Applied Materials, Inc.Inventors: Sipeng Gu, Yi Zheng, Qintao Zhang, John Hautala
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Patent number: 11334830Abstract: Methods and systems for providing a crisis management platform are described. A method includes receiving a first notification of an event, such as a crisis event. A second notification of the event is transmitted to user equipment devices of a plurality of individuals. A user selection of a crisis-related option from a plurality of crisis-related options is received after transmitting the second notification is transmitted, and an action is taken in response to receiving the user selection of the crisis-related option. An electronic document is designed and distributed as a portable tool with easily accessible information for a crisis team to use as a straightforward reference to manage the decisioning and workflow coordination related to crisis management. Interactive user interfaces with hyperlinks to various electronic resources and tools may be provided to automatically and methodologically inform various users of their roles and guide them through a crisis response procedure.Type: GrantFiled: July 16, 2015Date of Patent: May 17, 2022Assignee: JPMORGAN CHASE BANK, N.A.Inventors: Eric John Hautala, Mary Jane Tohlen, Robert Anthony Fucito
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Publication number: 20220093458Abstract: Embodiments herein include void-free material depositions on a substrate (e.g., in a void-free trench-filled (VFTF) component) obtained using directional etching to remove predetermined portions of a seed layer covering the substrate. In several embodiments, directional etching followed by selective deposition can enable fill material (e.g., metal) patterning in tight spaces without any voids or seams. Void-free material depositions may be used in a variety of semiconductor devices, such as transistors, dual work function stacks, dynamic random-access memory (DRAM), non-volatile memory, and the like.Type: ApplicationFiled: September 22, 2020Publication date: March 24, 2022Applicant: Applied Materials, Inc.Inventors: M. Arif Zeeshan, Kelvin Chan, Shantanu Kallakuri, Sony Varghese, John Hautala
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Publication number: 20210324519Abstract: A method may include providing a set of features in a mask layer, wherein a given feature comprises a first dimension along a first direction, second dimension along a second direction, orthogonal to the first direction, and directing an angled ion beam to a first side region of the set of features in a first exposure, wherein the first side region is etched a first amount along the first direction. The method may include directing an angled deposition beam to a second side region of the set of features in a second exposure, wherein a protective layer is formed on the second side region, the second side region being oriented perpendicularly with respect to the first side region. The method may include directing the angled ion beam to the first side region in a third exposure, wherein the first side region is etched a second amount along the first direction.Type: ApplicationFiled: May 24, 2021Publication date: October 21, 2021Applicant: APPLIED Materials, Inc.Inventor: John Hautala
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Publication number: 20210193478Abstract: A method may include providing a set of features in a mask layer, wherein a given feature comprises a first dimension along a first direction, second dimension along a second direction, orthogonal to the first direction, and directing an angled ion beam to a first side region of the set of features in a first exposure, wherein the first side region is etched a first amount along the first direction. The method may include directing an angled deposition beam to a second side region of the set of features in a second exposure, wherein a protective layer is formed on the second side region, the second side region being oriented perpendicularly with respect to the first side region. The method may include directing the angled ion beam to the first side region in a third exposure, wherein the first side region is etched a second amount along the first direction.Type: ApplicationFiled: December 30, 2019Publication date: June 24, 2021Applicant: APPLIED Materials, Inc.Inventor: John Hautala
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Publication number: 20210189566Abstract: A ribbon beam plasma enhanced chemical vapor deposition (PECVD) system comprising a process chamber containing a platen for supporting a substrate, and a plasma source disposed adjacent the process chamber and adapted to produce free radicals in a plasma chamber, the plasma chamber having an aperture associated therewith for allowing a beam of the free radicals to exit the plasma chamber, wherein the process chamber is maintained at a first pressure and the plasma chamber is maintained at a second pressure greater than the first pressure for driving the free radicals from the plasma chamber into the process chamber.Type: ApplicationFiled: April 5, 2020Publication date: June 24, 2021Applicant: APPLIED Materials, Inc.Inventors: John Hautala, Tristan Y. MA, Peter F. Kurunczi
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Patent number: 11043394Abstract: A method may include providing a set of features in a mask layer, wherein a given feature comprises a first dimension along a first direction, second dimension along a second direction, orthogonal to the first direction, and directing an angled ion beam to a first side region of the set of features in a first exposure, wherein the first side region is etched a first amount along the first direction. The method may include directing an angled deposition beam to a second side region of the set of features in a second exposure, wherein a protective layer is formed on the second side region, the second side region being oriented perpendicularly with respect to the first side region. The method may include directing the angled ion beam to the first side region in a third exposure, wherein the first side region is etched a second amount along the first direction.Type: GrantFiled: December 30, 2019Date of Patent: June 22, 2021Assignee: Applied Materials, Inc.Inventor: John Hautala
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Patent number: 11043380Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.Type: GrantFiled: May 14, 2018Date of Patent: June 22, 2021Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
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Publication number: 20210166936Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.Type: ApplicationFiled: February 8, 2021Publication date: June 3, 2021Applicant: Varian Semiconductor Equipment Associates, Inc.Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
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Patent number: 10990014Abstract: A method of patterning a substrate may include providing a blanket photoresist layer on the substrate; performing an ion implantation procedure of an implant species into the blanket photoresist layer, the implant species comprising an enhanced absorption efficiency at a wavelength in the extreme ultraviolet (EUV) range; and subsequent to the performing the ion implantation procedure, performing a patterned exposure to expose the blanket photoresist layer to EUV radiation.Type: GrantFiled: November 22, 2019Date of Patent: April 27, 2021Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Tristan Y. Ma, Huixiong Dai, Anthony Renau, John Hautala, Joseph Olson
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Patent number: 10971368Abstract: A method of treating a substrate includes directing ions to the substrate along at least one non-zero angle with respect to a perpendicular to a substrate surface in a presence of a reactive ambient containing a reactive species where the substrate includes a surface feature. At least one surface of the surface feature is etched using the ions in combination with the reactive ambient at a first etch rate that is greater than a second etch rate when the ions are directed to the substrate without the reactive ambient and greater than a third etch rate when the reactive ambient is provided to the substrate without the ions.Type: GrantFiled: February 23, 2018Date of Patent: April 6, 2021Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Steven R. Sherman, Simon Ruffell, John Hautala, Adam Brand
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Publication number: 20210005461Abstract: An optical grating component may include a substrate, and an optical grating, the optical grating being disposed on the substrate. The optical grating may include a plurality of angled structures, disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate, wherein the plurality of angled structures are arranged to define a variable depth along a first direction, the first direction being parallel to the plane of the substrate.Type: ApplicationFiled: September 22, 2020Publication date: January 7, 2021Applicant: Varian Semiconductor Equipment Associates, Inc.Inventors: John Hautala, Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph C. Olson
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Patent number: 10886279Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.Type: GrantFiled: May 15, 2020Date of Patent: January 5, 2021Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
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Patent number: 10818499Abstract: An optical grating component may include a substrate, and an optical grating, the optical grating being disposed on the substrate. The optical grating may include a plurality of angled structures, disposed at a non-zero angle of inclination with respect to a perpendicular to a plane of the substrate, wherein the plurality of angled structures are arranged to define a variable depth along a first direction, the first direction being parallel to the plane of the substrate.Type: GrantFiled: February 21, 2018Date of Patent: October 27, 2020Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: John Hautala, Morgan Evans, Rutger Meyer Timmerman Thijssen, Joseph C. Olson
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Publication number: 20200279852Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.Type: ApplicationFiled: May 15, 2020Publication date: September 3, 2020Applicant: Varian Semiconductor Equipment Associates, Inc.Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
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Publication number: 20200243308Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.Type: ApplicationFiled: April 17, 2020Publication date: July 30, 2020Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu
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Patent number: 10692872Abstract: A memory device may include an active device region, disposed at least partially in a first level. The memory device may include a storage capacitor, disposed at least partially in a second level, above the first level, wherein the first level and the second level are parallel to a substrate plane. The memory device may also include a contact via, the contact via extending between the storage capacitor and the active device region, and defining a non-zero angle of inclination with respect to a perpendicular to the substrate plane.Type: GrantFiled: December 12, 2017Date of Patent: June 23, 2020Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Sony Varghese, Anthony Renau, Morgan Evans, John Hautala, Joe Olson
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Patent number: 10685865Abstract: A method of forming a semiconductor device may include providing a semiconductor device structure. The semiconductor device structure may include semiconductor fins pitched at a fin pitch on a substrate and a mask, disposed over the semiconductor fins, the mask defining a plurality of openings. The semiconductor device structure may further include an isolation oxide disposed on the substrate, between the semiconductor fins. The method may further include directing angled ions into the at least one of the plurality of openings. The angled ions may form at least one trench between at least one pair of the semiconductor fins, in the substrate below the isolation oxide between the at least one pair of the semiconductor fins. Furthermore, a width within the substrate of the at least one trench is greater than a minimum fin pitch and greater than a width of the at least one trench above the substrate.Type: GrantFiled: July 17, 2018Date of Patent: June 16, 2020Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Min Gyu Sung, Sony Varghese, Johannes Van Meer, John Hautala
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Patent number: 10665433Abstract: A workpiece processing apparatus allowing independent control of the voltage applied to the shield ring and the workpiece is disclosed. The workpiece processing apparatus includes a platen. The platen includes a dielectric material on which a workpiece is disposed. A bias electrode is disposed beneath the dielectric material. A shield ring, which is constructed from a metal, ceramic, semiconductor or dielectric material, is arranged around the perimeter of the workpiece. A ring electrode is disposed beneath the shield ring. The ring electrode and the bias electrode may be separately powered. This allows the surface voltage of the shield ring to match that of the workpiece, which causes the plasma sheath to be flat. Additionally, the voltage applied to the shield ring may be made different from that of the workpiece to compensate for mismatches in geometries. This improves uniformity of incident angles along the outer edge of the workpiece.Type: GrantFiled: September 19, 2016Date of Patent: May 26, 2020Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Alexandre Likhanskii, Maureen Petterson, John Hautala, Anthony Renau, Christopher A. Rowland, Costel Biloiu