Abstract: Provided herein are approaches for patterning a semiconductor device. In an exemplary approach, a method includes providing a set of contact openings through a photoresist formed atop a substrate, and implanting ions into just a sidewall surface of the set of contact openings. In an exemplary approach, the ions are implanted at an implant angle nonparallel with the sidewall surface to prevent the ions from implanting a surface of the substrate within the set of contact openings, and to form a treated layer along an entire height of the contact opening. The method further includes etching the substrate within the set of contact openings after the ions are implanted into the sidewall surface. As a result, by using an angled ion implantation to the contact opening sidewall surface as a pretreatment prior to etching, local critical dimension uniformity is improved.

Abstract: Provided herein are approaches for patterning a semiconductor device. Exemplary approaches include providing a set of photoresist patterning features atop a substrate, the set of patterning features having a surface roughness characterized by a set of protrusions and a set of indentations. The approaches further include implanting first ions into a sidewall surface of the set of photoresist patterning features to form a film layer having a non-uniform thickness along the sidewall surface, wherein a thickness of the film layer formed over the indentations is greater than a thickness of the film layer formed over the protrusions. The approaches further include sputtering the sidewall surface of the photoresist patterning features following the formation of the film layer to modify a portion of the film layer and/or the set of protrusions, wherein the sputtering includes directing second ions to photoresist patterning features at an angle with the sidewall surface.

Abstract: Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.

Abstract: Approaches herein increase a ratio of reactive ions to a neutral species in a plasma processing apparatus. Exemplary approaches include providing a processing apparatus having a plasma source chamber including a first gas inlet, and a deposition chamber coupled to the plasma source chamber, wherein the deposition chamber includes a second gas inlet for delivering a point of use (POU) gas to an area proximate a substrate disposed within the deposition chamber. Exemplary approaches further include generating an ion beam for delivery to the substrate, and modifying a pressure within the deposition chamber in the area proximate the substrate to increase an amount of reactive ions present for impacting the substrate when the ion beam is delivered to the substrate.

Abstract: Provided herein are approaches for patterning a semiconductor device. In an exemplary approach, a method includes providing a set of contact openings through a photoresist formed atop a substrate, and implanting ions into just a sidewall surface of the set of contact openings. In an exemplary approach, the ions are implanted at an implant angle nonparallel with the sidewall surface to prevent the ions from implanting a surface of the substrate within the set of contact openings, and to form a treated layer along an entire height of the contact opening. The method further includes etching the substrate within the set of contact openings after the ions are implanted into the sidewall surface. As a result, by using an angled ion implantation to the contact opening sidewall surface as a pretreatment prior to etching, local critical dimension uniformity is improved.

Abstract: A method may include generating a plasma in a plasma chamber and directing the ions comprising at least one of a condensing species and inert gas species from the plasma to a cavity within a substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The method may further include; depositing a fill material within the cavity using the condensing species, the depositing taking place concurrently with the directing the ions, wherein the fill material accumulates on a lower surface of the cavity at a first rate, and wherein the fill material accumulates on an upper portion of a sidewall of the cavity at a second rate less than the first rate.

Abstract: Provided herein are approaches for patterning a semiconductor device. Exemplary approaches include providing a set of photoresist patterning features atop a substrate, the set of patterning features having a surface roughness characterized by a set of protrusions and a set of indentations. The approaches further include implanting first ions into a sidewall surface of the set of photoresist patterning features to form a film layer having a non-uniform thickness along the sidewall surface, wherein a thickness of the film layer formed over the indentations is greater than a thickness of the film layer formed over the protrusions. The approaches further include sputtering the sidewall surface of the photoresist patterning features following the formation of the film layer to modify a portion of the film layer and/or the set of protrusions, wherein the sputtering includes directing second ions to photoresist patterning features at an angle with the sidewall surface.

Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.

Abstract: A method for processing a substrate may include providing a patterning feature on the substrate, the patterning feature having a sidewall. The method may further include implanting a first ion species into the patterning feature during a first exposure, the first ion species having a first implantation depth; and implanting a second ion species into the patterning feature during a second exposure, the second ion species having a second implantation depth less than the first implantation depth.

Abstract: A method for processing a substrate may include providing a patterning feature on the substrate, the patterning feature having a sidewall. The method may further include implanting a first ion species into the patterning feature during a first exposure, the first ion species having a first implantation depth; and implanting a second ion species into the patterning feature during a second exposure, the second ion species having a second implantation depth less than the first implantation depth.

Abstract: A system and method for processing a workpiece is disclosed. A plasma chamber is used to create a ribbon ion beam, extracted through an extraction aperture. A workpiece is translated proximate the extraction aperture so as to expose different portions of the workpiece to the ribbon ion beam. As the workpiece is being exposed to the ribbon ion beam, at least one parameter associated with the plasma chamber is varied. The variable parameters include extraction voltage duty cycle, workpiece scan velocity and the shape of the ion beam. In some embodiments, after the entire workpiece has been exposed to the ribbon ion beam, the workpiece is rotated and exposed to the ribbon ion beam again, while the parameters are varied. This sequence may be repeated a plurality of times.

Abstract: In one embodiment, a method for etching a substrate includes providing a reactive ambient around the substrate when a non-crystalline layer is disposed over a first crystalline material in the substrate; generating a plasma in a plasma chamber; modifying a shape of a plasma sheath boundary of the plasma; extracting ions from the plasma; and directing the ions to the substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the ions and reactive ambient are effective to form an angled cavity through the non-crystalline layer to expose a portion of the first crystalline material at a bottom of the angled cavity, and the angled cavity forms a non-zero angle of inclination with respect to the perpendicular.

Abstract: In one embodiment, a processing apparatus may include a process chamber configured to house a substrate and a hybrid source assembly that includes a gas channel coupled to a molecular source; and a plasma chamber configured to generate a plasma and isolated from the gas channel. The processing apparatus may also include an extraction assembly disposed between the hybrid source assembly and process chamber, coupled to the gas channel and plasma chamber, and configured to direct an ion beam to a substrate, the ion beam comprising angled ions wherein the angled ions form a non-zero angle with respect to a perpendicular to a substrate plane; and configured to direct a molecular beam comprising molecular species received from the gas channel to the substrate.

Abstract: In one embodiment, a method for etching a substrate includes providing a reactive ambient around the substrate when a non-crystalline layer is disposed over a first crystalline material in the substrate; generating a plasma in a plasma chamber; modifying a shape of a plasma sheath boundary of the plasma; extracting ions from the plasma; and directing the ions to the substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the ions and reactive ambient are effective to form an angled cavity through the non-crystalline layer to expose a portion of the first crystalline material at a bottom of the angled cavity, and the angled cavity forms a non-zero angle of inclination with respect to the perpendicular.

Abstract: A method of treating a substrate includes directing ions to the substrate along at least one non-zero angle with respect to a perpendicular to a substrate surface in a presence of a reactive ambient containing a reactive species where the substrate includes a surface feature. At least one surface of the surface feature is etched using the ions in combination with the reactive ambient at a first etch rate that is greater than a second etch rate when the ions are directed to the substrate without the reactive ambient and greater than a third etch rate when the reactive ambient is provided to the substrate without the ions.

Abstract: An improved method of creating thermoelectric materials which have high electrical conductivity and low thermal conductivity is disclosed. In one embodiment, the thermoelectric material is made by depositing a porous film onto a substrate, introducing a dopant into the porous film and annealing the porous film to activate the dopant. In other embodiments, additional amounts of dopant may be introduced via subsequent ion implantations of dopant into the deposited porous film.

Abstract: An improved method of creating thermoelectric materials which have high electrical conductivity and low thermal conductivity is disclosed. In one embodiment, the thermoelectric material is made by depositing a porous film onto a substrate, introducing a dopant into the porous film and annealing the porous film to activate the dopant. In other embodiments, additional amounts of dopant may be introduced via subsequent ion implantations of dopant into the deposited porous film.

Abstract: An improved method of fabricating a resistive memory device is disclosed. A resistive memory includes a bottom electrode, a top electrode and a resistive material layer interposed therebetween. Interfaces are formed between the resistive material layer and the respective top and bottom electrodes. Ions are implanted in the device to change the characteristics of one or both of these interfaces, thereby improving the performance of the memory device. These ions may be implanted after the three layers are fabricated, during the fabrication of these layers, or at both times.

Abstract: Embodiments of methods for improving a copper/dielectric interface in semiconductor devices are generally described herein. Other embodiments may be described and claimed.

Abstract: A wafer processing cluster tool and method of operation provides one or more gas cluster ion beam processing chambers in possible combination with a deposition chamber and/or a cleaning chamber for performing sequential processing steps including, GCIB processing in a reduced pressure atmosphere.