Patents by Inventor Jong-Soo Yoon

Jong-Soo Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7978292
    Abstract: The invention is directed to simultaneously etching thin films to different uniform depths depending on positions by using a photoresist pattern having different thickness depending on positions as an etch mask in order to form a contact hole for a gate pad along with at least one other layer, or a data wire and a semiconductor pattern, via a single photolithography step.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: July 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Jong-Soo Yoon
  • Patent number: 7943939
    Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: May 17, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyu Kim, Jong-Soo Yoon
  • Publication number: 20100295050
    Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.
    Type: Application
    Filed: July 12, 2010
    Publication date: November 25, 2010
    Inventors: Dong-Gyu Kim, Jong-Soo Yoon
  • Patent number: 7800725
    Abstract: Disclosed is liquid crystal display, a substrate for a liquid crystal display and a method for manufacturing the substrate. The substrate comprises a transparent electrode formed on the insulating substrate, and a black matrix formed on the transparent electrode and performing the function also of protrusions. The method comprises the steps of forming a transparent electrode on a substrate, forming a black matrix layer, depositing a photosensitive material on the black matrix layer to form a photosensitive layer, patterning the photosensitive layer, and etching the black matrix layer using the photosensitive layer as a mask.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-Sun Na, Jong-Soo Yoon
  • Patent number: 7759176
    Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: July 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyu Kim, Jong-Soo Yoon
  • Patent number: 7742118
    Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: June 22, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hyung Souk, Jeong-Young Lee, Jong-Soo Yoon, Kwon-Young Choi, Bum-Ki Baek
  • Patent number: 7714960
    Abstract: Disclosed is liquid crystal display, a substrate for a liquid crystal display and a method for manufacturing the substrate. The substrate comprises a transparent electrode formed on the insulating substrate, and a black matrix formed on the transparent electrode and performing the function also of protrusions. The method comprises the steps of forming a transparent electrode on a substrate, forming a black matrix layer, depositing a photosensitive material on the black matrix layer to form a photosensitive layer, patterning the photosensitive layer, and etching the black matrix layer using the photosensitive layer as a mask.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: May 11, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-Sun Na, Jong-Soo Yoon
  • Patent number: 7697089
    Abstract: In an LCD apparatus (400) having simplified structure and improved luminance, a light supplying unit (100) supplies an LCD panel (280) with red light during a time corresponding to one-third of a frame, green light during the time and blue light during the time. A light reflective-transmissive unit is disposed between the light supplying unit (100) and the LCD panel assembly (200) to transmit the red light, the green light and the blue light and to reflect an external light from exterior of the LCD panel assembly (200). The LCD apparatus displays an image by means of white light as well as red light, green light and blue light, thereby improving luminance and simplifying structure.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: April 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Soo Yoon, Dong-Ho Lee
  • Patent number: 7659130
    Abstract: A gate conductor including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between the to be formed source electrode and drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data conductor including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for a storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: February 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Jong-Soo Yoon
  • Patent number: 7642757
    Abstract: A system and method for operating a Unified Power Flow Controller (UPFC) connected to a SCADA (Supervisory Control and Data Acquisition) are disclosed. The UPFC automatic operation system receives power system data from the SCADA system, automatically determines UPFC's optimum operation conditions according to power system states. The system includes: a UPFC acting as a serial/parallel FACTS to control variables of a power system; a SCADA for periodically acquiring line data of the power system and state data of the UPFC; and an upper controller for analyzing data received from the SCADA, and determining an UPFC's optimum operation mode for each power system condition and UPFC's optimum set-point control commands.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: January 5, 2010
    Assignee: Korea Electric Power Corporation
    Inventors: Jong-Soo Yoon, Seung-Pil Moon, Won-Kyo Lee, Chang-Gon Kim, Jin-Boo Choo, Young-Cheul Choi, Young-Soo Jeon, Byung-Hoon Chang, Soo-Yeol Kim
  • Publication number: 20090179202
    Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.
    Type: Application
    Filed: February 3, 2009
    Publication date: July 16, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mun-Pyo HONG, Woon-Yong PARK, Jong-Soo YOON
  • Patent number: 7507994
    Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Ki Baek, Mun-Pyo Hong, Jang-Soo Kim, Sung-Wook Hao, Jong-Soo Yoon, Doug-Gyu Kim
  • Patent number: 7504342
    Abstract: A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: March 17, 2009
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Woon-Yong Park, Jong-Soo Yoon
  • Patent number: 7504290
    Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: March 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mun-Pyo Hong, Woon-Yong Park, Jong-Soo Yoon
  • Publication number: 20090053842
    Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.
    Type: Application
    Filed: June 20, 2008
    Publication date: February 26, 2009
    Inventors: Dong-Gyu Kim, Jong-Soo Yoon
  • Publication number: 20080252806
    Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.
    Type: Application
    Filed: June 18, 2008
    Publication date: October 16, 2008
    Inventors: Jun-Hyung SOUK, Jeong-Young Lee, Jong-Soo Yoon, Kwon-Young Choi, Bum-Ki Baek
  • Publication number: 20080192198
    Abstract: Disclosed is liquid crystal display, a substrate for a liquid crystal display and a method for manufacturing the substrate. The substrate comprises a transparent electrode formed on the insulating substrate, and a black matrix formed on the transparent electrode and performing the function also of protrusions. The method comprises the steps of forming a transparent electrode on a substrate, forming a black matrix layer, depositing a photosensitive material on the black matrix layer to form a photosensitive layer, patterning the photosensitive layer, and etching the black matrix layer using the photosensitive layer as a mask.
    Type: Application
    Filed: March 6, 2008
    Publication date: August 14, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-Sun Na, Jong-Soo Yoon
  • Patent number: 7403240
    Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: July 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hyung Souk, Jeong-Young Lee, Jong-Soo Yoon, Kwon-Young Choi, Bum-Ki Baek
  • Patent number: 7393726
    Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: July 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyu Kim, Jong-Soo Yoon
  • Patent number: RE40162
    Abstract: A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: March 25, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-Yong Park, Jong-Soo Yoon, Chang-Oh Jeong