Abstract: A method of manufacturing a thin film transistor array panel is provided, the method includes: forming a gate line on an insulating substrate; forming a gate insulating layer; forming a semiconductor layer; forming a data conductive layer including a data line and a drain electrode; depositing a passivation layer; forming a photoresist including a first portion located on an end portion of the gate line, a second portion thicker than the first portion and located on the drain electrode, and a third portion thicker than the second portion; exposing a portion of the passivation layer under the second portion of the photoresist and a portion of the gate insulating layer under the first portion of the photoresist by etching using the photoresist as an etch mask; forming first and second contact holes exposing the drain electrode and the end portions of the gate line, respectively; and forming a pixel electrode connected to the drain electrode through the first contact hole.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad.

Abstract: The present invention relates to the formation, on a substrate having a display area and a peripheral area, of a gate wire including a plurality of gate lines and gate electrodes in a display area and gate pads in the peripheral area, and of a common wire, including a common signal line and a plurality of common electrodes in the display area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact layer are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area, and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittances between the display area and the peripheral area.

Abstract: A gate wire including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between a source electrode and a drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data wire including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.

Abstract: The present invention relates to the formation, on a substrate having a display area and a peripheral area, of a gate wire including a plurality of gate lines and gate electrodes in a display area and gate pads in the peripheral area, and of a common wire, including a common signal line and a plurality of common electrodes in the display area. A gate insulating layer, a semiconductor layer, an ohmic contact layer and a conductor layer are sequentially deposited, and the conductor layer and the ohmic contact layer are patterned to form a data wire including a plurality of data lines, a source electrode and a drain electrode of the display area, and data pads of the peripheral area, and an ohmic contact layer pattern thereunder. A passivation layer is deposited and a positive photoresist layer is coated thereon. The photoresist layer is exposed to light through one or more masks having different transmittances between the display area and the peripheral area.

Abstract: A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area.

Abstract: Disclosed is a transmissive and reflective type LCD. In the LCD, a second substrate faces a first substrate. Liquid crystal layer is formed between the first and second substrate. A first polarizing plate is formed on outer surface of the first substrate. A second polarizing plate is formed on outer surface of the second substrate. A backlight is arranged at a rear side of the first polarizing plate. A transparent transflective film is arranged between the first polarizing plate and the backlight and has a plurality of layers where a first and a second layer each having different refractivity indexes are alternatively stacked. The transparent transflective film partially reflects and transmits incident light. By a restoring process occurring between the transflective film and the backlight, a predetermined amount of the incident light is transmitted through the transflective film repeatedly, so that transmissivity and light efficiency are enhanced.

Abstract: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is coated thereon. The photoresist layer is exposed to light through a mask and developed to form a photoresist pattern. At this time, a first portion of the photoresist pattern which is located between the source electrode and the drain electrode is thinner than a second portion which is located on the data wire, and the photoresist layer is totally removed on other parts. The thin portion is made by controlling the amount of irradiating light or by a reflow process to form a thin portion, and the amount of light is controlled by using a mask that has a slit, a small pattern smaller than the resolution of the exposure device, or a partially transparent layer.

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad.

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad. Next, a passivation layer is deposited and patterned to form contact holes respectively exposing the drain electrode, the gate pad, and the data pad.

Abstract: A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: Disclosed are a system and a method for analyzing and utilizing intellectual property information.

Abstract: A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate.

Abstract: Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched.

Abstract: A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area.