Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: Devices and methods use an integrated microfluidic system that has the capability of realizing a wide range of accurate dilutions in a logarithmic way through semi-direct dilution of samples inside a chip. The device for dose response analysis is able to contain a first fluid source on a microfluidic chip, wherein the first fluid source comprises a drug, a second fluid source on the microfluidic chip, a mixing area on the microfluidic chip fluidically coupling with the first and the second fluidic source, and a detection area coupling with the mixing area for drug information detection using a detection system.

Abstract: Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: The system and method of the present application is a microfluidic array system for biological, chemical and biochemical assessments including a microfluidic chip for reaction assays, wherein the microfluidic chip includes a control layer and a fluidic layer, wherein the control layer is pressurized through pneumatic or hydraulic means in order to control the flow of the reagents in the fluidic layer. The system and method of the present application further includes a method of fabricating such a microfluidic chip, and further a method for operating the same. Lastly, the system and method of the present application further includes a system for operating and analyzing the microfluidic array including a pressure source, a fluidic source, a biochip reader, and a processor configured to control the same.

Abstract: A programmable fluidic device for generating droplets with resolutions of micrometer in size and milliseconds in generation timing is provided. The programmable fluidic device has a valve forming a droplet cutter, which contains a fluid deflectable membrane capable of controlling the flow of a dispensing fluid from a fluidic dispensing channel. The programmable fluidic device is able to perform temporal control over the droplet generation independent from the size control.

Abstract: A method of fabricating an image sensor according to example embodiments may include forming a photodiode in a photoelectric conversion region of a substrate and forming an etch stop layer on the substrate. The etch stop layer may be patterned to form an inner lens on the photoelectric conversion region and an etch stop layer pattern on a transistor region of the substrate. A metal interconnection structure may be formed on the inner lens and the etch stop layer pattern. Accordingly, the number of additional processes for fabricating an image sensor may be reduced.

Abstract: An automated and computerized system for characterizing kinetic activities is disclosed. The system includes an optical unit with a controller chip. The controller chip has multiple reaction cells for simultaneously reacting samples of the catalyst under a range of reaction conditions and for optically monitoring the kinetic activity within each of the reaction cells: The system also preferably includes a temperature controller in thermal contact with the controller chip and an actuation device coupled to the controller chip for injecting and mixing samples of the catalyst with reagents into each of the reaction cells to form a product.

Abstract: Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Abstract: Methods of forming a dielectric layer of a MIM capacitor can include forming a passivation layer on a dielectric layer of a MIM capacitor to separate the dielectric layer from direct contact with an overlying photo-resist pattern. Related capacitor structures are also disclosed.

Abstract: The system and method of the present application is a microfluidic array system for biological, chemical and biochemical assessments including a microfluidic chip for reaction assays, wherein the microfluidic chip includes a control layer and a fluidic layer, wherein the control layer is pressurized through pneumatic or hydraulic means in order to control the flow of the reagents in the fluidic layer. The system and method of the present application further includes a method of fabricating such a microfluidic chip, and further a method for operating the same. Lastly, the system and method of the present application further includes a system for operating and analyzing the microfluidic array including a pressure source, a fluidic source, a biochip reader, and a processor configured to control the same.

Abstract: An image sensor includes a first sub-pixel, a second sub-pixel, and an image processor. The first sub-pixel generates a first image signal with a first sensitivity, and the second sub-pixel generates a second image signal with a second sensitivity less than the first sensitivity. The image signal processor adds a change in the second image signal from a saturation level to the first image signal to generate a final image signal when the first sub-pixel is saturated.

Abstract: A method of fabricating an image sensor according to example embodiments may include forming a photodiode in a photoelectric conversion region of a substrate and forming an etch stop layer on the substrate. The etch stop layer may be patterned to form an inner lens on the photoelectric conversion region and an etch stop layer pattern on a transistor region of the substrate. A metal interconnection structure may be formed on the inner lens and the etch stop layer pattern. Accordingly, the number of additional processes for fabricating an image sensor may be reduced.

Abstract: Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: An image sensor and methods of fabricating the same are provided. An example method may include forming at least one gate on a substrate, forming first, second and third layers on the at least one gate, first etching the third layer with a first etching process, the second layer configured to be resistant to the first etching process, the first etching process reducing at least a portion of the third layer and exposing at least a portion of the second layer and second etching at least the exposed portion of the second layer with a second etching process other than the first etching process, the first layer configured to be resistant to the second etching process.