Patents by Inventor Joon Han
Joon Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240067812Abstract: A moisture-curable semiconductive formulation consisting essentially of a polyethylene-based polymer blend (uncured) and a conventional carbon black. The polyethylene-based polymer blend comprises a mixture of an ethylene/(alkenyl-functional hydrolyzable silane)/(optional olefinic hydrocarbon) copolymer and an ethylene/unsaturated carboxylic ester copolymer that is free of moisture curable groups. We also discovered methods of making and using same, a moisture-cured semiconductive product made therefrom, and articles containing or made from same.Type: ApplicationFiled: March 23, 2022Publication date: February 29, 2024Inventors: Paul J. Caronia, Jeffrey M. Cogen, Bharat I. Chaudhary, Timothy J. Person, Suh Joon Han
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Publication number: 20240071645Abstract: A moisture-curable semiconductive formulation consisting essentially of a mixture of an ethylene/(alkenyl-functional hydrolyzable silane)/(optional olefinic hydrocarbon) copolymer and a conventional carbon black. Also discovered methods of making and using same, a moisture-cured semiconductive product made therefrom, and articles containing or made from same.Type: ApplicationFiled: March 23, 2022Publication date: February 29, 2024Inventors: Paul J. Caronia, Jeffrey M. Cogen, Bharat I. Chaudhary, Timothy J. Person, Suh Joon Han
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Publication number: 20240070067Abstract: A storage device, including: a nonvolatile memory device comprising a plurality of memory cells; and a controller configured to perform a write operation on at least one write unit included in the plurality of memory cells, and to perform an erase operation on at least one erase unit included in the plurality of memory cells, wherein the controller is further configured to: allocate a plurality of zones to a storage space of the nonvolatile memory device based on a request received from an external host device, select two or more erase units from among a plurality of erase units included in the plurality of memory cells to be allocated to each zone of the plurality of zones, fixedly and sequentially manage logical addresses of data to be written in the plurality of zones, and generate at least two map tables for the each zoneType: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seunghyun CHOI, Keunsan PARK, Joon-Whan BAE, Jooyoung HWANG, Gyeongmin KIM, Heetak SHIN, Junyeong HAN
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Publication number: 20240066564Abstract: Proposed are a substrate processing apparatus and a substrate processing method capable of efficiently preventing contamination of a substrate and a processing space caused by a reverse flow of purge gas.Type: ApplicationFiled: March 27, 2023Publication date: February 29, 2024Applicant: SEMES CO., LTD.Inventors: Do Hyung KIM, Dae Hun KIM, Young Jin KIM, Tae Ho KANG, Young Joon HAN, Eun Hyeok CHOI, Jun Gwon LEE
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Publication number: 20240067023Abstract: A hybrid charging device includes an alternating current (AC)-direct current (DC) converter for converting an AC input power to a first DC power; a DC-DC converter for converting a DC input power to a second DC power; a power combiner for generating a charge power for an electric vehicle from at least one of the first DC power or the second DC power; and a charge controller for controlling the AC-DC converter, the DC-DC converter and the power combiner.Type: ApplicationFiled: August 26, 2022Publication date: February 29, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Seung-Kyu YOON, Ho-Seung HAN, Young-joon SHIN
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Patent number: 11915859Abstract: Disclosed is a core for a current transformer, which forms an upper core in a round shape, and is disposed at a position lower than the center of a power line having both ends of the upper core received, thereby minimizing the stress of a magnetic path, and increases the permeability, thereby enhancing the magnetic induction efficiency. The disclosed core for the current transformer includes an upper core curved in a semi-circular shape to have a receiving groove formed therein, and having both ends extended downwards to be disposed to be spaced apart from each other and a lower core disposed on the lower portion of the upper core, and having both ends extended upwards to be disposed to face both ends of the upper core.Type: GrantFiled: August 4, 2017Date of Patent: February 27, 2024Assignee: AMOSENSE CO., LTDInventors: Cheol-Seung Han, Won-San Na, Jin-Pyo Park, Young-Joon Kim, Jae-Jun Ko
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Patent number: 11908117Abstract: An image processing method implemented by a processor includes receiving an image, acquiring a target image that includes an object from the image, calculating an evaluation score by evaluating a quality of the target image, and detecting the object from the target image based on the evaluation score.Type: GrantFiled: April 12, 2021Date of Patent: February 20, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Hao Feng, Jae-Joon Han, Changkyu Choi, Chao Zhang, Jingtao Xu, Yanhu Shan, Yaozu An
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Publication number: 20240050990Abstract: The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes a housing having a treating space; a support unit configured to support a substrate in the treating space; and a brush unit configured to clean the substrate supported on the support unit, and wherein the brush unit includes: a body having a circular-shaped cross-section; and a plurality of contact pads protruding from the body and defining a plurality of groove portions for discharging foreign substances dropped from a substrate, each groove portion defined between adjacent contact pads, and wherein a width of the groove portion near a center of the body is different from a width of the groove portion near an edge of the body.Type: ApplicationFiled: February 15, 2023Publication date: February 15, 2024Applicant: SEMES CO., LTD.Inventors: Do Hyung Kim, Dae Hun Kim, Young Jin Kim, Tae Ho Kang, Jun Gwon Lee, Young Joon Han, Eun Hyeok Choi
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Publication number: 20240014111Abstract: Disclosed are a fan-out packaging device and a method of manufacturing the fan-out packaging device, and more particularly a fan-out packaging device using a bridge, the fan-out packaging device including a bridge formed at one side of a fan-out package having two or more dies integrated therein, at least one trace formed at the bridge, and a connection terminal formed at an end of the trace, the connection terminal being in contact with a contact terminal of the fan-out package, wherein the different dies integrated in the fan-out package are electrically connected to each other via the bridge.Type: ApplicationFiled: March 15, 2023Publication date: January 11, 2024Inventors: Byung Joon HAN, Byung Hoon AHN
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Patent number: 11861937Abstract: The facial verification apparatus is a mobile computing apparatus, including a camera to capture an image, a display, and one or more processors. While in a lock state, the image is captured and facial verification performed using a face image, or using a detected face and in response to the face being detected. The facial verification includes a matching with respect to the detected face, or obtained face image, and a registered face information. If the verification is successful, the lock state of the apparatus may be canceled and the user allowed access to the apparatus. The lock state may be cancelled when the verification is successful and the user has been determined to have been attempting to gain access to the apparatus. Face image feedback to the user may not be displayed during the detecting for, or obtaining of, the face and/or performing of the facial verification.Type: GrantFiled: April 25, 2019Date of Patent: January 2, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Seungju Han, Minsu Ko, Deoksang Kim, Jae-Joon Han
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Publication number: 20230422479Abstract: A semiconductor device includes a first active pattern included in an upper portion of a substrate in a memory cell region, and having an isolated shape extending so that a direction oblique to a first direction is a major axis direction of the first active pattern. A first device isolation pattern provided inside a first trench included in the substrate, and covering a side wall of the first active pattern is provided. A first gate structure is provided inside a gate trench extending in the first direction on upper portions of the first active pattern and the first device isolation pattern. A barrier impurity region is selectively formed only on surfaces of both side walls of a major axis of the first active pattern. First and second impurity regions are provided on the upper portion of the first active pattern adjacent to both sides of the first gate structure.Type: ApplicationFiled: April 12, 2023Publication date: December 28, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jeesun Lee, Junsoo Kim, Daehyun Moon, Namhyun Lee, Seonhaeng Lee, Sungho Jang, Joohyun Jeon, Joon Han
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Patent number: 11790065Abstract: A user verification apparatus may perform user verification using multiple biometric verifiers. The user verification apparatus may set a termination stage of one or more biometric verifiers. Multiple biometric verifiers may be used to generate outputs, for which separate termination stages are set to establish a particular combination of set termination stages associated with the multiple biometric verifiers, and the user verification apparatus may fuse outputs of the biometric verifiers based on the particular combination of set termination stages. The user verification apparatus may verify a user based on a result of the fusing, and an unlocking command signal may be generated based on the verifying. The unlocking command signal may be generated to selectively grant access, to the verified user, to one or more elements of a device. The device may be a vehicle.Type: GrantFiled: April 26, 2021Date of Patent: October 17, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Sungjoo Suh, Seungju Han, Jae-Joon Han, Chang Kyu Choi
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Patent number: 11747320Abstract: A method of manufacturing and using a nanofluidic NAND transistor sensor array scheme including a plurality of nanopore channel pillars, a plurality of respective fluidic channels, a plurality of gate electrodes, a top chamber, and a bottom chamber includes placing a sensor substrate in an electrolyte solution comprising biomolecules and DNA. The method also includes placing first and second electrodes in the electrolyte solution (Vpp and Vss of the nanofluidic NAND transistor); forming the nanopore channel pillars; placing the gate electrodes and gate insulators in respective walls of the nanopore channel pillars; applying an electrophoretic bias in the first and second electrodes; applying a bias in the gate electrodes; detecting a change in an electrode current in the electrolyte solution caused by a change in a gate voltage; and detecting a change in a surface charge in nanopore channel electrodes in the respective fluidic channels.Type: GrantFiled: July 19, 2021Date of Patent: September 5, 2023Assignee: PALOGEN, INC.Inventors: Kyung Joon Han, Jungkee Yoon
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Patent number: 11747898Abstract: A gaze estimation method and apparatus is disclosed. The gaze estimation method includes obtaining an image including an eye region of a user, extracting, from the obtained image, a first feature of data, obtaining a second feature of data used for calibration of a neural network model, and estimating a gaze of the user using the first feature and the second feature.Type: GrantFiled: August 5, 2021Date of Patent: September 5, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Xiabing Liu, Hui Zhang, Jae-Joon Han, Changkyu Choi, Tianchu Guo
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Publication number: 20230228710Abstract: A method of synthesizing an oligonucleotide using a nanofluidic device including a plurality of nanopore channels, a plurality of electrodes, and an electrolyte solution, includes coupling a primer to an inner wall of a nanopore channel of the plurality of nanopore channels, the primer having a protecting group. The method also includes applying a voltage to an electrode of the plurality of electrodes that corresponds to the nanopore channel to produce an acid from the electrolyte solution at the electrode. The electrode includes an anode and a cathode disposed at opposite sides of the nanopore channel. The method further includes the acid removing the protecting group from the primer. Moreover, the method includes coupling a nucleotide to the primer with the protecting group removed to form an intermediate product. In addition, the method includes repeating the steps on the intermediate product until the oligonucleotide is synthesized.Type: ApplicationFiled: March 27, 2023Publication date: July 20, 2023Applicant: PALOGEN, INC.Inventors: Bita Karimirad, Kyung Joon Han
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Publication number: 20230215741Abstract: A substrate processing apparatus includes a nozzle unit including a nozzle tip discharging liquid to a substrate; and a liquid supply line supplying the liquid to the nozzle unit, wherein the liquid supply line includes a liquid supply pipe connected to the nozzle tip; a supply valve installed in the liquid supply pipe; and a heater disposed between the nozzle tip and the supply valve in the liquid supply pipe.Type: ApplicationFiled: October 25, 2022Publication date: July 6, 2023Inventors: Young Joon HAN, Gi Hun CHOI, Seung Tae YANG, Sang Woo PARK, Seong Hyeon KIM, Bu Young JUNG
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Publication number: 20230207306Abstract: Disclosed is a method for treating a substrate in a plurality of chambers. The substrate treating method may include performing liquid treatment on a substrate located in a chamber through a supply line for connecting a circulation line and each of the plurality of chambers while the liquid circulates in the circulation line, wherein a flow rate per unit time of the liquid flowing downstream of a valve provided in the supply line is constantly maintained at a reference flow rate, and controlling an upstream flow rate which is a flow rate per unit time of the liquid flowing upstream of the circulation line rather than the supply lines or a downstream flow rate which is a flow rate per unit time of the liquid flowing downstream of the circulation line rather than the supply lines based on a distribution flow rate which is a flow rate per unit time of the liquid flowing upstream of the valve to maintain the reference flow rate.Type: ApplicationFiled: December 23, 2022Publication date: June 29, 2023Applicant: SEMES CO., LTD.Inventors: Do Gyeong HA, Moon Soon CHOL, Young Joon Han, Seung Tae YANG
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Publication number: 20230207355Abstract: An apparatus for treating a substrate of the present invention includes a buffer unit, an inversion unit, a first transfer chamber, a second transfer chamber, a first cleaning chamber, and a second cleaning chamber. The first transfer chamber, the inversion unit, and the second transfer chamber are sequentially arranged in one direction. The first cleaning chamber is disposed at one side of the first transfer chamber, and the second cleaning chamber is disposed at one side of the second transfer chamber. A first main transfer robot provided in the first transfer chamber directly transfers the substrate between the buffer unit, the inversion unit, and the first cleaning chamber. The second main transfer robot provided in the second transfer chamber directly transfers the substrate between the buffer unit, the inversion unit, and the second cleaning chamber.Type: ApplicationFiled: December 22, 2022Publication date: June 29, 2023Applicant: SEMES CO., LTD.Inventors: Kun Hee PARK, Young Joon HAN, Cheol Hwan JEONG, Dae Hun KIM, Seong Hyun YUN, Ye Jin CHOI, Eun Hyeok CHOI, Tae Ho KANG, Young Jin KIM
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Publication number: 20230204562Abstract: A nanopore device for detecting charged biopolymer molecules and defining a nanochannel, includes a first gating nanoelectrode addressing a first end of the nanochannel. The device also includes a second gating nanoelectrode addressing a second end of the nanochannel opposite the first end. The device further includes a first sensing nanoelectrode addressing a first location in the nanochannel between the first and second ends.Type: ApplicationFiled: February 28, 2023Publication date: June 29, 2023Applicant: PALOGEN, INC.Inventors: Bita Karimirad, Kyung Joon Han, Reza Rahighi Yazdi, Won Jong Yoo
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Patent number: 11686701Abstract: A method of calibrating a nanofluidic device including a plurality of nanopore channels, a plurality of gating nanoelectrodes, and a plurality of sensing nanoelectrodes, includes applying a selecting voltage across a gating nanoelectrode of the plurality of gating nanoelectrodes to select a nanopore channel. The method also includes tuning the nanopore channel by applying a first biasing voltage across a sensing electrode of the plurality of sensing nanoelectrodes, and receiving a plurality of currents over a plurality of frequencies. The method further includes generating a calibration data set from the pluralities of frequencies and currents. Moreover, the method includes comparing the calibration data set with a reference data set. In addition, the method includes when the calibration data set differs from the reference data set by more than a predetermined threshold, repeating the method with a second biasing voltage different from the first biasing voltage.Type: GrantFiled: July 16, 2020Date of Patent: June 27, 2023Assignee: PALOGEN, INC.Inventors: Imran Ali, Kyung Joon Han, Kang-Yoon Lee