Abstract: Disclosed is a technique, in which when driving chips are used in which control units are respectively merged in driving devices, all modes of the other driving chips are simultaneously converted into a fail safe mode when one driving chip detects a non-signal state. A circuit for controlling a non-signal of a flat panel display device includes a plurality of driving chips.

Abstract: Disclosed is a source driver integrated circuit with an improved slew rate by disposing a switching unit, which operates as a resistance component during display driving, before the feedback line of an output buffer. According to the source driver integrated circuit with an improved slew rate, a switching unit, which operates as a resistance component when a signal is transferred, is disposed in the feedback loop of an output buffer, so that the resistance component is not shown to a panel load, thereby improving the slew rate of an output signal. In addition, the improved slew rate makes it possible to easily implement an image through a display.

Abstract: An LCD driving circuit includes a first buffer configured to have a terminal for a first voltage, a terminal for a second voltage and a terminal for an intermediate voltage between the first voltage and the second voltage, and be driven in a range from the first voltage to the intermediate voltage; and a second buffer configured to have a terminal for the first voltage, a terminal for the second voltage and a terminal for the intermediate voltage, and be driven in a range from the intermediate voltage to the second voltage. The terminal for the intermediate voltage of the first buffer and the terminal for the intermediate voltage of the second buffer are connected with each other, and the first voltage is a highest voltage, the second voltage is a lowest voltage, and the intermediate voltage is in a range from the first voltage to the second voltage.

Abstract: A circuit for processing a touch line signal of a touch screen includes a plurality of sensing read circuits and a switch unit. The plurality of sensing read circuits include sensing read-out units and integrators, respectively. The sensing read-out units are configured to precharge a first sensor capacitor and a second sensor capacitor formed on a touch screen panel with a ground voltage and a supply voltage, allow charges charged in the first sensor capacitor and the second sensor capacitor to be shared, and read-out a charge sharing result obtained by allowing the charges of the first sensor capacitor and the second sensor capacitor to be shared. The integrators are configured to integrate output voltages of the sensing read-out units. The switch unit is configured to sequentially connect output terminals of the plurality of sensing read circuits to an input terminal of an analog-to-digital converter.

Abstract: A circuit for measuring a capacitance value of a touch screen includes: a target capacitor unit having a target capacitor charged with a target charging voltage; a target voltage control unit to charge the target capacitor; a reference capacitor unit having a reference capacitor charged with a charging reference voltage; a reference voltage control unit to charge the reference capacitor; a comparator to compare the target charging voltage and the charging reference voltage and output a transition signal at a moment when the target charging voltage becomes higher than the charging reference voltage; and a controller to receive an output signal of the comparator and a clock signal and generate a digital output signal and a control signal, wherein a capacitance value of the target capacitor is measured using a time elapsed from a time when the target capacitor is initialized to a time when the transition signal is outputted.

Abstract: A DAC circuit using a charge subtraction method and a change transfer interpolation method includes resistor cells configured to divide a voltage of data of total K bits (=upper M bits+lower N bits) by resistance dividers; a decoder group configured to receive digital data of the M bits and the N bits divided in the resistor cells, process the digital data by the unit of 2 bits, and output respective corresponding voltages; a capacitor group configured to receive the voltages outputted from the decoder group and realize charge charging by a charge subtraction method and charge transferring by a charge transfer interpolation method; and an operational amplifier having a first input terminal which receives a reference voltage and a second input terminal which receives an interpolation voltage corresponding to an amount of charges transferred from the capacitor group, and configured to generate an output voltage.

Abstract: A digital-to-analog converter of a data driver and a converting method thereof, in which information corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio. Input data corresponding to a lower bit is converted into an analog signal through control of current transmission paths and control of a transconductance ratio between a delta current generation section and an output buffer amplifier. As a consequence, not only the area of a data driver can be significantly reduced, but also the delta current generation section can be realized even without using a common node feedback circuit, whereby an additional increase in area is not caused.

Abstract: A display panel driving circuit includes N number of amplifiers configured to supply N number of output voltages to a display panel; N number of output switches configured to transmit output signals from the N number of amplifiers through N number of pads to the display panel; and a plurality of charge sharing switches configured to share charges among the N number of pads, wherein the charge sharing switches are formed in the pads.

Abstract: A display driving circuit and method is capable of minimizing the residual image of a display panel as well as consumption electric current. The display driving circuit generates driving signals corresponding to valid data and black data and transmits the driving signals to a display panel, and includes N data selection switches (where N is the integer), N buffers, N buffer output selection switches, and multiple charge sharing switches. The N data selection switches select one of the valid data and the black data. The N buffers buffer the signal selected by the respective data selection switches. The N buffer output selection switches switch outputs of the buffers to output the respective driving signals. The multiple charge sharing switches connect the neighboring pairs of the driving signals.

Abstract: A source driver circuit of a liquid crystal display device including a gamma buffer. The gamma buffer includes a differential amplification section configured to differentially amplify an input signal; a current mirror section configured to operate as a current mirror; an enable section configured to convert the differential amplification section from a standby mode to an enable mode by a bias voltage; a power drop speed improvement section configured to respectively connect drains of the two PMOS transistors of the current mirror section and drains of the two NMOS transistors of the differential amplification section through two diode coupling type MOS transistors, and shorten a recovery time after a power drop; and an output section configured to be determined in a bias level thereof by the bias voltage and generate an output voltage according to a voltage of a downstream node on one side of the current mirror section.

Abstract: An output driver of an electronic paper display device includes M number of output driver sections configured to transmit M number of pieces of data, respectively, to the electronic paper display device, wherein the M number of output driver sections are divided into a plurality of groups, and are temporally dispersed and driven according to groups, thereby transmitting the M number of pieces of data to the electronic paper display device. Also, an output driver for transmitting data to an electronic paper display device includes N number of drivers, wherein a part of the N number of drivers are selected and driven according to an output impedance of the electronic paper display device. Since output driver sections are divided into groups and are dispersedly driven, peak current is reduced. Since drivers are selectively driven according to the sizes of output loads, a constant driving capability is provided.

Abstract: A gamma voltage generator includes an RGB common gamma voltage generation section configured to generate RGB common gamma voltages using corresponding gamma reference voltages among a plurality of gamma reference voltages; and at least two of an RG gamma voltage generation section configured to generate RG gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, an R gamma voltage generation section configured to generate R gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, a G gamma voltage generation section configured to generate G gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, and a B gamma voltage generation section configured to generate B gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages.

Abstract: A display panel driving circuit includes: N number of buffers (N is an integer no less than 1) configured to buffer data voltages and enable or disable supply of buffered signals in response to a charge sharing control signal; and N number of output multiplexers each configured to receive outputs of two adjacent buffers among outputs of the N number of buffers and transfer the output of one buffer or the outputs of the two buffers to a corresponding one of data lines in response to the charge sharing control signal.

Abstract: A liquid crystal display driving circuit and method. A data register block of a controller applies in advance a polarity control signal to data before the data are stored in latches of a data driver, exchanges the data, and then stores the exchanged data in the latches. Thereby, it is possible to provide multiplexers, which are otherwise required for respective channels, to one controller and to decrease the size of a chip.

Abstract: An LCM for a display panel includes a pixel array, a plurality of source driver ICs, and a plurality of gate driver ICs. The plurality of source driver ICs are disposed in a horizontal direction at an upper side or lower side of the pixel array. The plurality of gate driver ICs are disposed in a vertical direction at a left side or right side of the pixel array. The plurality of gate driver ICs are disposed at an opposite position to a position where a source driver IC, among the plurality of source driver ICs, first supplied with video data and a clock signal is disposed.

Abstract: A circuit for driving an organic light emitting diode display includes a display panel that displays an image by using organic light emitting diodes disposed at intersection areas of a plurality of gate lines and a plurality of data lines; a threshold voltage detection control unit that supplies a precharge voltage by sequentially turning on transistors for threshold voltage detection, which are connected among the data lines and the organic light emitting diodes on the display panel, in units of horizontal lines, and enables threshold voltages to be detected; and a source driver that detects threshold voltages of all organic light emitting diodes arranged on a corresponding horizontal line, and repeats an operation, as necessary, for sampling/holding the detected threshold voltages through M sample/hold circuits, converting the sampled/held threshold voltages into digital signals, and storing the digital signals in a memory.

Abstract: Disclosed is a liquid crystal display panel driving circuit for driving a liquid crystal display panel with a resolution of N bits. N-bit digital data including upper X bits and lower Y bits is inputted. The liquid crystal display panel driving circuit includes a resistor string unit according to areas, a DAC converter switching unit according to areas, and an interpolation amplifier. The resistor string unit outputs analog reference voltages at different ratios according to three areas. The DAC converter switching unit receives the N-bit digital data, selects (Y+1) analog voltages from the analog reference voltages based on the upper X bits, outputs the (Y+1) analog voltages, and outputs the (Y+1) analog voltages of different combinations based on the lower Y bits. The interpolation amplifier receives the (Y+1) analog voltages and generates an interpolated output voltage by setting weights for the (Y+1) analog voltages by using multi-factors.

Abstract: A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip.

Abstract: A pad layout structure of a driver IC chip of a liquid crystal display device includes dummy power pads and dummy ground pads, which are disposed in corners of the driver IC chip and are connected to main power pads and main ground pads by metal lines in a chip-on-film (COF) package. Accordingly, it is possible to reduce the resistance of power supply lines and ground lines, to minimize a power dip of a block located far away from the main power pads and main ground pads, and to prevent a failure in power application, which may occur due to a decrease of adhesive strength at a specific position, by dispersing the adhesion positions of the power pads and ground pads.

Abstract: Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance.