Patents by Inventor Judah Gamliel Hahn
Judah Gamliel Hahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11656994Abstract: A non-volatile storage system that is implementing a storage region (e.g., a persistent memory region) which is accessible to a host (e.g., via a PCIe connection) and a cache for the storage region shares details of the structure of the storage region and/or the cache (e.g., cache segment size). With awareness of the shared details of the structure of the storage region and/or the cache, the host arranges and sends out requests to read data from the persistent memory region in a manner that takes advantage of parallelism within the non-volatile storage system. For example, the host may initially send out one read request per cache segment to cause the non-volatile storage system to load the cache. Subsequently, additional read requests are made to the non-volatile storage system, with the data already loaded (or starting to load) in the cache, thereby increasing performance.Type: GrantFiled: May 3, 2021Date of Patent: May 23, 2023Assignee: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Shay Benisty, Ariel Navon
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Publication number: 20230153028Abstract: The present disclosure generally relates to host memory buffer (HMB) cache management in DRAM-less SSDs. HMB is transient memory and may not always be available. For example, when the link between the data storage device and the host device is not active, the data storage device can't access the HMB. Placing an HMB log in the HMB controller that is disposed in the data storage device provides access to data that would otherwise be inaccessible in the HMB. The HMB log contains any deltas that have occurred since either the last copying to an HMB cache in the memory device or any delta that have occurred since the link became inactive. The HMB cache mirrors the HMB. In so doing, the data of the HMB is available to the data storage device not only when the link is active, but also when the link is not active.Type: ApplicationFiled: March 31, 2022Publication date: May 18, 2023Applicant: Western Digital Technologies, Inc.Inventors: Judah Gamliel HAHN, Shay BENISTY, Ariel NAVON
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Publication number: 20230153027Abstract: The present disclosure generally relates to host memory buffer (HMB) cache management. HMB is transient memory and may not always be available. For example, when the link between the data storage device and the host device is not active, the data storage device can't access the HMB. Placing an HMB log in the HMB controller that is disposed in the data storage device provides access to data that would otherwise be inaccessible in the HMB. The HMB log contains any deltas that have occurred since either the last copying to an HMB cache in the memory device or any delta that have occurred since the link became inactive. The HMB cache mirrors the HMB. In so doing, the data of the HMB is available to the data storage device not only when the link is active, but also when the link is not active.Type: ApplicationFiled: November 15, 2021Publication date: May 18, 2023Applicant: Western Digital Technologies, Inc.Inventors: Judah Gamliel HAHN, Shay BENISTY, Ariel NAVON
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Patent number: 11640267Abstract: A data storage device includes a memory device including a plurality of endurance groups and a controller coupled to the memory device. The controller is configured to allocate tokens to the plurality of endurance groups, determine whether endurance group has sufficient tokens to perform an operation, and either deny the operation or approve the operation. The operation is selected from the group consisting of: garbage collection, relocation of data, and read scrubbing. Each operation has the same or different cost as another operation. The controller is further configured to set thresholds for each endurance group of the plurality of endurance groups and adjust a threshold for one or more endurance groups of the plurality of endurance groups. The controller is further configured to determine whether the operation will breach quality of service for other endurance groups.Type: GrantFiled: September 9, 2021Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Dudy David Avraham, Ran Zamir, Judah Gamliel Hahn
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Patent number: 11640371Abstract: The present disclosure generally relates to a storage snapshot management system. When updated data is written to the memory device, rather than rewriting all of the data, only the updated data is written to a new namespace. A snapshot of the new namespace indicates which LBAs in the new namespace contain data. New namespaces are added each time data is updated. When the updated data is to be read, the data storage device reads the updated LBA from the new namespace, and also gathers the non-updated data from the previous namespace. Eventually, the number of namespaces for the data reaches a threshold, and thus some namespaces need to be evicted. To evict a namespace, the updated data in the namespace is moved to a different namespace, or the non-updated data is moved to a namespace that contains updated data. In either case, the now unused namespaces are evicted.Type: GrantFiled: March 12, 2020Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Shay Benisty, Judah Gamliel Hahn, Ariel Navon
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Patent number: 11640395Abstract: A method and apparatus for carrying out a database select, or query, on a data storage device, upon data stored on that device. Data is received from a host and compressed on the data storage device using a compression code developed on the data storage device for the data. When the host issues a database select request on the compressed data, the compression code is distributed to processing cores of the data storage device and compiled, including the select request, into machine code. The machine code is used to decompress the compressed data while filtering the data with the select request. The filtering result is returned to the host.Type: GrantFiled: February 22, 2021Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Israel Zimmerman, Eyal Hakoun, Judah Gamliel Hahn
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Patent number: 11640251Abstract: The present disclosure generally relates to data storage devices, such as solid state drives, and effective power management of the data storage device. The data storage device includes a controller, where the controller is configured to predict when a host device will send a command to enter a low power state, prepare the data storage device to enter the low power state, and receive a command to enter the low power state after the predicting and preparing. If the data storage device is idled for greater than a threshold value, then the data storage device prepares to transition to a low power state but will wait to enter the lower power state until receiving a request from a host device.Type: GrantFiled: February 25, 2021Date of Patent: May 2, 2023Assignee: Western Digital Technologies, Inc.Inventors: Shay Benisty, Judah Gamliel Hahn, Ariel Navon
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Publication number: 20230120600Abstract: Aspects of the present disclosure generally relate to data storage devices, systems, and related methods that group commands of doorbell transactions from host devices into a plurality of groupings. A controller of a data storage device is configured to receive a plurality of submission doorbell transactions comprising a plurality of commands from a host device. The controller is configured to group the plurality of commands of the plurality of submission doorbell transactions into a plurality of groupings having a grouping order. Each grouping of the plurality of groupings corresponds to a single doorbell transaction of the plurality of submission doorbell transactions. The controller is configured to send one or more completion doorbell transactions to the host device. Each completion doorbell transaction of the one or more completion doorbell transactions identifies a completed grouping of the plurality of groupings.Type: ApplicationFiled: October 20, 2021Publication date: April 20, 2023Inventors: Shay BENISTY, Judah Gamliel HAHN, Ariel NAVON
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Patent number: 11630592Abstract: A method and apparatus for a database management architecture on an SSD. A list of tables is stored in the SSD, and records of a table are stored across multiple FIMs of the SSD such that a group of records may be read in parallel by concurrently reading from multiple FIMs. The records of the table are stored on jumboblocks, organized in an unordered fashion as a linked list. New records are added to the end of the linked list. Records having gaps resulting from data modification or bad portions of an NVM die are re-organized via garbage collection when the gap memory size reaches about 20% of table memory size.Type: GrantFiled: February 22, 2021Date of Patent: April 18, 2023Assignee: Western Digital Technologies, Inc.Inventors: Israel Zimmerman, Eyal Hakoun, Judah Gamliel Hahn
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Publication number: 20230101626Abstract: A data storage device and method for file-based interrupt coalescing are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to execute a plurality of read commands read from a submission queue in a host; write a plurality of completion messages to a completion queue in the host; and coalesce interrupts to inform the host that plurality of completion messages were written to the completion queue; wherein the submission queue and the completion queue are dedicated to read commands from a host application and are separate from a submission queue and a completion queue for read and write commands from an operating system of the host. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.Type: ApplicationFiled: September 29, 2021Publication date: March 30, 2023Applicant: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Shay Benisty, Ariel Navon
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Publication number: 20230071705Abstract: A data storage device includes a memory device including a plurality of endurance groups and a controller coupled to the memory device. The controller is configured to allocate tokens to the plurality of endurance groups, determine whether endurance group has sufficient tokens to perform an operation, and either deny the operation or approve the operation. The operation is selected from the group consisting of: garbage collection, relocation of data, and read scrubbing. Each operation has the same or different cost as another operation. The controller is further configured to set thresholds for each endurance group of the plurality of endurance groups and adjust a threshold for one or more endurance groups of the plurality of endurance groups. The controller is further configured to determine whether the operation will breach quality of service for other endurance groups.Type: ApplicationFiled: September 9, 2021Publication date: March 9, 2023Inventors: Dudy David Avraham, Ran Zamir, Judah Gamliel Hahn
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Patent number: 11601656Abstract: A method and apparatus for video processing on a data storage device. A chip bound architecture includes a CMOS coupled to one or more NAND die, the CMOS including one or more processors, memories, and error correction code (ECC) engines capable of processing video data. According to certain embodiments, macroblocks are correlated between two I-frames, including motion vectors to define different locations of correlated macroblocks. A P-frame may be determined from a previous I-frame and its correlated macroblocks and motion vectors, while a B-frame may be determined from two or more adjacent I-frames with concomitant macroblocks and motion vectors, as well as P-frames associated with an adjacent I-frame.Type: GrantFiled: June 16, 2021Date of Patent: March 7, 2023Assignee: Western Digital Technologies, Inc.Inventors: Alon Marcu, Ofir Pele, Ariel Navon, Shay Benisty, Karin Inbar, Judah Gamliel Hahn
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Patent number: 11593520Abstract: A method and apparatus for enforcing privacy within one or more memories of a data storage system are disclosed. In one embodiment, sensor data containing personally identifiable information (PII) is provided to a memory. In some embodiments, the memory of disclosed systems and methods may be volatile, non-volatile, or a combination. Within the memory, PII is detected in some embodiments by AI-based computer vision, voice recognition, or natural language processing methods. Detected PII is obfuscated within the memory prior to making the sensor data available to other systems or memories. In some embodiments, once PII has been obfuscated, the original sensor data is overwritten, deleted, or otherwise made unavailable.Type: GrantFiled: April 19, 2021Date of Patent: February 28, 2023Assignee: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Ariel Navon, Shay Benisty
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Publication number: 20230051007Abstract: The present disclosure generally relates to aborting a command efficiently using the host memory buffer (HMB). The command contains pointers that direct the data storage device to various locations on the data storage device where relevant content is located. Once the abort command is received, the content of the host pointers stored in the data storage device RAM are changed to point to the HMB. The data storage device then waits until any already started transactions over the interface bus that are associated with the command have been completed. Thereafter, a failure completion command is posted to the host device.Type: ApplicationFiled: November 3, 2022Publication date: February 16, 2023Applicant: Western Digital Technologies, Inc.Inventors: Shay BENISTY, Judah Gamliel HAHN
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Publication number: 20230039071Abstract: A data storage device includes a non-volatile memory device including a memory block having a number of memory dies, and a controller coupled to the memory device. A memory access command is received and a memory access operation based on the received command is performed. A number of bytes transferred during the memory access operation is determined, and the determined number of bytes is analyzed to determine whether the number of transferred bytes is equal to a predetermined number. A transfer status fail bit is set if the number of transferred bytes is not equal to the predetermined number.Type: ApplicationFiled: August 6, 2021Publication date: February 9, 2023Inventors: Daniel Linnen, Aashish Sangoi, Kirubakaran Periyannan, Judah Gamliel Hahn
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Patent number: 11573893Abstract: A storage system and method for validation of hints prior to garbage collection are provided. In one embodiment, a method is provided comprising receiving a command from a host to store data in a memory; storing, in the memory, the data and a hint that characterizes the data; determining whether the hint is still valid; and in response determining that the hint is still valid, using the hint in performing garbage collection. Other embodiments are provided.Type: GrantFiled: September 12, 2019Date of Patent: February 7, 2023Assignee: Western Digital Technologies, Inc.Inventors: Ramanathan Muthiah, Judah Gamliel Hahn
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Patent number: 11561909Abstract: Technology is disclosed for allocating PCIe bus bandwidth to storage commands in a peer-to-peer environment. A non-volatile storage system has a peer-to-peer connection with a host system and a target device, such as a GPU. A memory controller in the storage system monitors latency of PCIe transactions that are performed over a PCIe bus in order to transfer data for NVMe commands. The PCIe transactions may involve direct memory access (DMA) of memory in the host system or target device. There could be a significant difference in transaction latency depending on what memory is being accessed and/or what communication link is used to access the memory. The memory controller allocates bandwidth on a PCIe bus to the NVMe commands based on the latencies of the PCIe transactions. In an aspect, the memory controller groups the PCIe addresses based on the latencies of the PCIe transactions.Type: GrantFiled: April 28, 2021Date of Patent: January 24, 2023Assignee: Western Digital Technologies, Inc.Inventors: Judah Gamliel Hahn, Shay Benisty, Ariel Navon
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Patent number: 11556268Abstract: A method and system for cache-based flow of a simple copy command is disclosed. The present disclosure generally relates to methods and systems for executing a simple copy command in a manner that mitigates additional latency in the device. According to certain embodiments, a copy command manager that includes one or more copy command slots is provided. When a simple copy command is received from a host, a copy command slot is allocated to the command, and the simple copy command is copied into the copy command slot. Upon copying the simple copy command to the copy command slot, an overlap table of the data storage device controller is updated to indicate the copy has been completed, and the completion is posted to the host. After posting, the simple copy command is carried out in the background through completion.Type: GrantFiled: April 22, 2021Date of Patent: January 17, 2023Assignee: Western Digital Technologies, Inc.Inventors: Shay Benisty, Judah Gamliel Hahn, Ariel Navon
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Patent number: 11556274Abstract: A data storage device includes a memory device having a plurality of endurance groups and a controller coupled to the memory device. The controller includes at least one decoder or at least one decoder group. The controller is configured to allocate a plurality of tokens to each endurance group of the plurality of endurance groups, receive a payment of tokens from an endurance group to access the at least one decoder or the at least one decoder group, and grant access to the at least one decoder or the at least one decoder group to the endurance group based on the payment of tokens. Each decoder or each decoder group is associated with the same or different payment of tokens and each endurance group has a maximum capacity of tokens.Type: GrantFiled: September 1, 2021Date of Patent: January 17, 2023Assignee: Western Digital Technologies, Inc.Inventors: Dudy David Avraham, Ran Zamir, Judah Gamliel Hahn
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Patent number: 11550487Abstract: A data storage device and method for enabling endurance re-evaluation are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The controller is configured to receive data and a first storage requirement for the data from a host; store the data in a first group of memory cells in the memory, wherein the first group of memory cells satisfies the first storage requirement; receive a notification from the host that the first storage requirement has changed to a second storage requirement; and move the data from the first group of memory cells to a second group of memory cells in the memory, wherein the second group of memory cells satisfies the second storage requirement. Other embodiments are provided.Type: GrantFiled: February 19, 2021Date of Patent: January 10, 2023Assignee: Western Digital Technologies, Inc.Inventors: Ramanathan Muthiah, Judah Gamliel Hahn