Patents by Inventor Jui Hsieh Lai
Jui Hsieh Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11630271Abstract: A package structure is provided. The package structure includes a waveguide, a passivation layer, and a reflector. The waveguide is over a substrate. The passivation layer is over the substrate and covers the waveguide. The reflector includes a metal layer and a semiconductor layer on the passivation layer. The metal layer and the first semiconductor layer are in contact with the passivation layer.Type: GrantFiled: July 26, 2022Date of Patent: April 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Publication number: 20220357533Abstract: A package structure is provided. The package structure includes a waveguide, a passivation layer, and a reflector. The waveguide is over a substrate. The passivation layer is over the substrate and covers the waveguide. The reflector includes a metal layer and a semiconductor layer on the passivation layer. The metal layer and the first semiconductor layer are in contact with the passivation layer.Type: ApplicationFiled: July 26, 2022Publication date: November 10, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui HUANG, Jui-Hsieh LAI, Shang-Yun HOU
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Patent number: 11428879Abstract: A method for forming a package structure is provided. The method includes disposing an optical component and a waveguide over a substrate, forming a passivation layer over the substrate and covering the optical component and the waveguide, and forming a reflector including a metal layer and a first semiconductor layer on the passivation layer, wherein the metal layer and the first semiconductor layer are in contact with the passivation layer.Type: GrantFiled: March 10, 2021Date of Patent: August 30, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Publication number: 20220270894Abstract: A package structure is provided. The package structure includes a semiconductor die structure over a substrate and bonding structures between the semiconductor die and the substrate. The package structure also includes multiple solder elements over the substrate. The solder elements together surround the semiconductor die structure, and each of the solder elements is longer than a side of the semiconductor die structure. The package structure further includes an underfill material surrounding the bonding structures. The underfill material is substantially confined within a region surrounded by the solder elements. The underfill material is in direct contact with at least one of the solder elements.Type: ApplicationFiled: May 5, 2022Publication date: August 25, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuan-Yu HUANG, Sung-Hui HUANG, Jui-Hsieh LAI, Shang-Yun HOU
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Patent number: 11328936Abstract: A structure and a formation method of a package structure are provided. The method includes forming one or more solder elements over a substrate. The one or more solder elements surround a region of the substrate. The method also includes disposing a semiconductor die structure over the region of the substrate. The method further includes dispensing a polymer-containing liquid onto the region of the substrate. The one or more solder elements confine the polymer-containing liquid to being substantially inside the region. In addition, the method includes curing the polymer-containing liquid to form an underfill material.Type: GrantFiled: July 12, 2019Date of Patent: May 10, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuan-Yu Huang, Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Patent number: 11150404Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: GrantFiled: August 16, 2019Date of Patent: October 19, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
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Publication number: 20210215894Abstract: A method for forming a package structure is provided. The method includes disposing an optical component and a waveguide over a substrate, forming a passivation layer over the substrate and covering the optical component and the waveguide, and forming a reflector including a metal layer and a first semiconductor layer on the passivation layer, wherein the metal layer and the first semiconductor layer are in contact with the passivation layer.Type: ApplicationFiled: March 10, 2021Publication date: July 15, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Patent number: 11060977Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.Type: GrantFiled: December 10, 2019Date of Patent: July 13, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jui Hsieh Lai, Ying-Hao Kuo
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Patent number: 10985125Abstract: A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump.Type: GrantFiled: September 23, 2020Date of Patent: April 20, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shu-Chia Hsu, Leu-Jen Chen, Yi-Wei Liu, Shang-Yun Hou, Jui-Hsieh Lai, Tsung-Yu Chen, Chien-Yuan Huang, Yu-Wei Chen
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Patent number: 10948668Abstract: A method for forming a package structure is provided, including: disposing an optical component and a waveguide over a first substrate; forming a passivation layer over the first substrate and covering the optical component and the waveguide; removing a portion of the passivation layer to form a first opening; and disposing a reflector over the passivation layer, wherein a metal layer of the reflector is formed in the first opening.Type: GrantFiled: May 14, 2020Date of Patent: March 16, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Publication number: 20210005567Abstract: A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump.Type: ApplicationFiled: September 23, 2020Publication date: January 7, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Yu HUANG, Sung-Hui HUANG, Shu-Chia HSU, Leu-Jen CHEN, Yi-Wei LIU, Shang-Yun HOU, Jui-Hsieh LAI, Tsung-Yu CHEN, Chien-Yuan HUANG, Yu-Wei CHEN
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Patent number: 10866361Abstract: A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material.Type: GrantFiled: October 22, 2019Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jui Hsieh Lai, Ying-Hao Kuo
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Patent number: 10840231Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.Type: GrantFiled: November 15, 2019Date of Patent: November 17, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
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Patent number: 10790254Abstract: A chip package structure is provided. The chip package structure includes a substrate having a first surface and a second surface opposite to the first surface. The chip package structure includes a first chip structure and a second chip structure over the first surface. The chip package structure includes a protective layer over the first surface and surrounding the first chip structure and the second chip structure. A portion of the protective layer is between the first chip structure and the second chip structure. The chip package structure includes a first anti-warpage bump over the second surface and extending across the portion of the protective layer. The chip package structure includes a conductive bump over the second surface and electrically connected to the first chip structure or the second chip structure. The first anti-warpage bump is wider than the conductive bump.Type: GrantFiled: February 15, 2019Date of Patent: September 29, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shu-Chia Hsu, Leu-Jen Chen, Yi-Wei Liu, Shang-Yun Hou, Jui-Hsieh Lai, Tsung-Yu Chen, Chien-Yuan Huang, Yu-Wei Chen
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Publication number: 20200278509Abstract: A method for forming a package structure is provided, including: disposing an optical component and a waveguide over a first substrate; forming a passivation layer over the first substrate and covering the optical component and the waveguide; removing a portion of the passivation layer to form a first opening; and disposing a reflector over the passivation layer, wherein a metal layer of the reflector is formed in the first opening.Type: ApplicationFiled: May 14, 2020Publication date: September 3, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Patent number: 10748825Abstract: In some embodiments, the present disclosure relates to a package for holding a plurality of integrated circuits. The package includes a first conductive pad disposed over a first substrate and a second conductive pad disposed over a second substrate. The second conductive pad is a multi-layer structure having an uppermost metal layer including titanium or nickel. A molding structure surrounds the first substrate and the second substrate. A conductive structure is over the first substrate and the second substrate. The conductive structure is conductively coupled to the second conductive pad.Type: GrantFiled: April 12, 2019Date of Patent: August 18, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wan-Yu Lee, Chun-Hao Tseng, Jui Hsieh Lai, Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
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Publication number: 20200203186Abstract: A structure and a formation method of a package structure are provided. The method includes forming one or more solder elements over a substrate. The one or more solder elements surround a region of the substrate. The method also includes disposing a semiconductor die structure over the region of the substrate. The method further includes dispensing a polymer-containing liquid onto the region of the substrate. The one or more solder elements confine the polymer-containing liquid to being substantially inside the region. In addition, the method includes curing the polymer-containing liquid to form an underfill material.Type: ApplicationFiled: July 12, 2019Publication date: June 25, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuan-Yu Huang, Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Patent number: 10656351Abstract: A package structure is provided. The package structure includes an optical component over a substrate, and a reflector disposed over the substrate. The reflector includes a first semiconductor layer over a second semiconductor layer, and a dielectric layer between the first semiconductor layer and the second semiconductor layer. The reflector also includes a metal layer between the second semiconductor layer and the substrate. In addition, the package structure includes a waveguide between the metal layer and the optical component.Type: GrantFiled: December 21, 2018Date of Patent: May 19, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Publication number: 20200132949Abstract: A package structure is provided. The package structure includes an optical component over a substrate, and a reflector disposed over the substrate. The reflector includes a first semiconductor layer over a second semiconductor layer, and a dielectric layer between the first semiconductor layer and the second semiconductor layer. The reflector also includes a metal layer between the second semiconductor layer and the substrate. In addition, the package structure includes a waveguide between the metal layer and the optical component.Type: ApplicationFiled: December 21, 2018Publication date: April 30, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Sung-Hui Huang, Jui-Hsieh Lai, Shang-Yun Hou
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Publication number: 20200110035Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.Type: ApplicationFiled: December 10, 2019Publication date: April 9, 2020Inventors: Jui Hsieh Lai, Ying-Hao Kuo