Patents by Inventor Jui Hsieh Lai

Jui Hsieh Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160284569
    Abstract: An approach is provided for aligning and leveling a chip package portion. The approach involves filling, at least partially, a reservoir formed between a first sidewall portion having a first slanted surface and a second sidewall portion having a second slanted surface with a fluid. The approach also involves placing a chip package portion into the reservoir. The approach further involves draining the fluid from the reservoir to cause the chip package portion to align with respect to a center of the reservoir. The chip package portion aligns with respect to the center of the reservoir and levels based on a relationship between the chip package portion, an angle of the first slanted surface, an angle of the second slanted surface, and the fluid. The chip package portion is secured in the aligned and leveled state by a molding compound.
    Type: Application
    Filed: June 13, 2016
    Publication date: September 29, 2016
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20160245998
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Application
    Filed: May 2, 2016
    Publication date: August 25, 2016
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Patent number: 9423578
    Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 9419156
    Abstract: A package for holding a plurality of heterogeneous integrated circuits includes a first chip having a first conductive pad and a first substrate including a first semiconductor, and a second chip having a second conductive pad and a second substrate including a second semiconductor. The second semiconductor is different from the first semiconductor. The package also includes a molding structure in which the first chip and the second chip are embedded, a conductive structure over the first chip and conductively coupled to the first conductive pad and over the second chip and conductively coupled to the second conductive pad, and a passivation layer over the conductive structure. The passivation layer comprises an opening defined therein which exposes a portion of the second chip.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: August 16, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wan-Yu Lee, Chun-Hao Tseng, Jui Hsieh Lai, Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 9410893
    Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Patent number: 9405063
    Abstract: An integrated circuit includes a substrate, a metal grating disposed over the substrate, and a waveguide layer disposed over or under the metal grating. The metal grating is arranged to change a propagation direction of an optical signal and the waveguide layer is arranged to guide the optical signal to a desired direction.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: August 2, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Tien-I Bao, Hai-Ching Chen, Ying-Hao Kuo
  • Patent number: 9368375
    Abstract: An approach is provided for aligning and leveling a chip package portion. The approach involves filling, at least partially, a reservoir formed between a first sidewall portion having a first slanted surface and a second sidewall portion having a second slanted surface with a fluid. The approach also involves placing a chip package portion into the reservoir. The approach further involves draining the fluid from the reservoir to cause the chip package portion to align with respect to a center of the reservoir. The chip package portion aligns with respect to the center of the reservoir and levels based on a relationship between the chip package portion, an angle of the first slanted surface, an angle of the second slanted surface, and the fluid. The chip package portion is secured in the aligned and leveled state by a molding compound.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: June 14, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 9335473
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: May 10, 2016
    Assignee: Taiwan Semiconductor Manfacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20160116335
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Application
    Filed: January 4, 2016
    Publication date: April 28, 2016
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Patent number: 9228896
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: January 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Publication number: 20150318239
    Abstract: An apparatus includes a base portion having an upper surface and a lower surface opposite the upper surface. The apparatus also includes a first sidewall portion having a first upper portion distal the upper surface of the base portion and a first slanted sidewall between the first upper portion and the upper surface of the base portion. The apparatus further includes a second sidewall portion having a second upper portion distal the upper surface of the base portion and a second slanted sidewall between the second upper portion and the upper surface of the base portion. The first sidewall portion and the second sidewall portion define a first reservoir between the first slanted sidewall and the second slanted sidewall, the first reservoir being configured to receive a first chip package portion and to secure the first chip package portion in a first curing position.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 5, 2015
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE
  • Publication number: 20150287705
    Abstract: An apparatus includes a package structure. The package structure includes a chip, a conductive structure over the chip, a molding structure surrounding and underneath the chip, and a first passivation layer over the conductive structure. The chip includes an optical component and a chip conductive pad. The conductive structure is electrically coupled to the chip conductive pad. The conductive structure has a planar portion substantially in parallel with an upper surface of the chip. The first passivation layer has a first opening defined therein. The first opening exposes a portion of the planar portion. The package structure is configured to receive an electrical coupling through the first opening in the first passivation layer.
    Type: Application
    Filed: June 22, 2015
    Publication date: October 8, 2015
    Inventors: Wan-Yu LEE, Chun-Hao TSENG, Jui Hsieh LAI, Tien-Yu HUANG, Ying-Hao KUO, Kuo-Chung YEE
  • Patent number: 9099623
    Abstract: A manufacture includes a package structure, a first substrate, and a conductive member of a same material. The package structure includes a chip comprising a conductive pad, a conductive structure over the chip, and a passivation layer over the conductive structure. The passivation layer has an opening defined therein, and the opening exposes a portion of a planar portion of the conductive structure. The first substrate includes a first surface defining a first reference plane and a second surface defining a second reference plane. The conductive member extends across the first reference plane and the second reference plane and into the opening. The conductive member is electrically coupled to the exposed portion of the planar portion.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: August 4, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wan-Yu Lee, Chun-Hao Tseng, Jui Hsieh Lai, Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20150212270
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Patent number: 9093449
    Abstract: An approach is provided for placing and securing a chip package portion in an aligned position during a curing process. The approach involves providing an apparatus having a first reservoir configured to receive a first chip package, a second reservoir, and a third reservoir. The approach also involves placing the first chip package portion into the first reservoir, the second chip package portion into the second reservoir, and the third chip package portion into the third reservoir. The approach further involves causing the first chip package portion to be secured in a first curing position, the second chip package portion to be secured in a second curing position and the third chip package portion to be secured in a third curing position.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: July 28, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20150168659
    Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.
    Type: Application
    Filed: February 26, 2015
    Publication date: June 18, 2015
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20150146203
    Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO
  • Patent number: 9041015
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20150131089
    Abstract: An optical spectroscopy device includes a first cladding layer is positioned over a photodetector. An optical core region is over the first cladding layer where the optical core region is configured to receive a light beam. The optical core region includes a first grating having a first pitch where the first pitch is positioned to direct a first wavelength of the light beam to a first portion of the photodetector. The optical core region further includes a second grating having a second pitch where the second grating is positioned to direct a second wavelength of the light beam to a second portion of the photodetector. The first pitch is different from the second pitch, the first wavelength is different from the second wavelength, and the first portion of the photodetector is different from the second portion of the photodetector. Additionally, a second cladding layer is over the optical core region.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO
  • Publication number: 20150108667
    Abstract: An approach is provided for placing and securing a chip package portion in an aligned position during a curing process. The approach involves providing an apparatus having a first reservoir configured to receive a first chip package, a second reservoir, and a third reservoir. The approach also involves placing the first chip package portion into the first reservoir, the second chip package portion into the second reservoir, and the third chip package portion into the third reservoir. The approach further involves causing the first chip package portion to be secured in a first curing position, the second chip package portion to be secured in a second curing position and the third chip package portion to be secured in a third curing position.
    Type: Application
    Filed: October 23, 2013
    Publication date: April 23, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jui Hsieh LAI, Ying-Hao KUO, Kuo-Chung YEE