Abstract: A hard disk drive, in which a flexible printed circuit board (FPC) bracket is readily assembled and sealed to a base together with a gasket header even though a screw or a sealing tape that involves a screw driver or other assembling tools is not used, or a boss of the base is not tapped.

Abstract: A lead frame unit, a semiconductor package having a lead frame unit, a stacked semiconductor package having a semiconductor package, and methods of manufacturing the same are provided. The lead frame unit in a stacked semiconductor package may include a die pad supporting a semiconductor chip, an inner lead electrically connected to the semiconductor chip, an outer lead extending from the inner lead, and a heat-resistant insulation member surrounding the connection portion. The outer lead may include a connection portion connected to the inner lead and a junction portion connected to the connection portion and a circuit board. An external signal may be applied to the junction portion. If the lead frame unit is used in the stacked semiconductor package, the outer lead and a dummy outer lead in the stacked semiconductor package may have substantially the same shape.

Abstract: There is provided a multilayer type test board assembly for high-precision inspection. The multilayer test board assembly comprises: a plurality of test boards separated from each other according to their functions, having input/output signal terminals, and including at least one test board each having a first section where first mounting devices sensitive to an influence of electrical signals are mounted and a second section where second mounting devices insensitive to an influence of electrical signals are mounted; spacers that arrange the test boards in parallel by spacing apart the test boards by predetermined intervals; connection cables connected to the input/output signal terminals of the test boards; and a signal shielding fence formed on each of the at least one test board so as to protect the first mounting devices from electrical signals generated by the second mounting devices.

Abstract: In a capacitor structure and a method of manufacturing the capacitor structure, first and second conductive patterns are formed on a substrate. The first and second conductive patterns extend in a first direction. The first and second conductive patterns are alternately arranged to be spaced apart from one another in a second direction substantially perpendicular to the first direction. An insulating interlayer is formed on the substrate to cover the first and second conductive patterns. Third and fourth conductive patterns extending in a third direction lying at an angle of between about 0° and about 90° relative to the first direction are formed on the insulating interlayer. The third and fourth conductive patterns are alternately arranged to be spaced apart from one another in a fourth direction substantially perpendicular to the third direction.

Abstract: An IC package including a plurality of BGA IC packages stacked on a printed circuit board and a method of manufacturing the same. The IC package includes a printed circuit board, a first BGA IC package, having a plurality of first solder balls, stacked on the printed circuit board, a second BGA IC package, having a plurality of second solder balls, stacked on the first BGA IC package, and an interposer having a plurality of through-holes, which are filled by the second solder balls in a molten state such that the length of the second solder balls increases while the second solder balls harden, the interposer being joined to the top of the first BGA IC package.

Abstract: Disclosed is a ball land structure suitable for use with a semiconductor package. The ball land structure includes a ball land and a barrier on a core. The barrier may be configured to connect to the ball land so as to form a barrier hole between an edge of the ball land and an edge of the barrier thus exposing a portion of the core. A solder mask may be deposited on the ball land and a portion of the core exposed by the barrier hole so as to partially expose the core.

Abstract: A damper including a cylinder, a piston inserted in the cylinder, a movable member disposed in the piston to be movable in the cylinder in a length direction of the cylinder, and a weight sensor mounted on an inner surface of the cylinder, facing an end of the piston, to perceive weight loaded on the piston through contact with the movable member. When applied to a washing machine, the damper is capable of perceiving accurate weight of the laundry supplied in the washing machine.

Abstract: A fan-out unit which can control a resistance difference among channels with efficient space utilization and a thin-film transistor (TFT) array substrate having the fan-out unit are presented. The fan-out unit includes: an insulating substrate; a first wiring layer which is formed on the insulating substrate and connected to a pad; a second wiring layer which is formed on the insulating substrate and connected to a TFT; and a resistance controller which is connected between the first wiring layer and the second wiring layer and includes a plurality of first resistors extending parallel to the first wiring layer and a plurality of second resistors extending perpendicular to the first resistors and alternately connecting to the first resistors, wherein the first resistors are longer than the second resistors.

Abstract: A display device comprises: a display panel including a first insulating substrate and a second insulating substrate that is arranged so as to deviate from the first insulating substrate; and an intermediate frame, wherein the intermediate frame includes: side walls that are arranged so as to correspond to four side surface of the display panel; a mounting portion which protrudes from the side walls inward and on which the first insulating substrate is mounted; and a supporting protrusion that protrudes from the mounting portion to the second insulating substrate and is arranged below the second insulating substrate and on the side of the first insulating substrate.

Abstract: A liquid crystal display includes; first and second substrates facing each other, a liquid crystal layer interposed between the first and second substrates and including liquid crystal molecules, a first subpixel electrode disposed on the first substrate, the first subpixel electrode receiving a first data voltage, a second subpixel electrode disposed on the first substrate, the second subpixel electrode receiving a second data voltage; and a short protrusion disposed on the second substrate and simultaneously facing the first and second subpixel electrodes, wherein the liquid crystal layer is vertically aligned and has positive dielectric anisotropy.

Abstract: A backlight unit and method of use are provided having a first light guide plate, a linear light source disposed along at least one side edge of the first light guide plate, a plurality of second light guide plates facing the first light guide plate, and a point light source disposed along at least one side edge of each second light guide plate. Accordingly, the present invention can provide a backlight unit using both a point light source and a linear light source at substantially the same time, and having superior color reproducibility and low power consumption.

Abstract: An oscillatory wave generating unit and an oscillatory wave sensing unit are installed at both ends of a refrigerant pipe of an evaporator of the cooling system, an amount of frost formed on the refrigerant pipe is determined by comparing a wave form of an oscillatory wave generated from one end of the refrigerant through the oscillatory wave generating unit and a wave form of the oscillatory wave sensed by the other one end of the refrigerant through the oscillatory wave sensing unit, and whether or not a defrosting operation is performed is determined by a result of the determination. The cooling system increases the accuracy in sensing the amount of the frost formed on the evaporator of a refrigerator, a Kimchi refrigerator, or an air conditioner, and respectively starts and ends the defrosting operation at proper points of time, thus enhancing a heat-exchanging performance and increasing energy efficiency.

Abstract: Example embodiments are directed to an antifuse circuit of an inverter type and a method of programming the same. The antifuse circuit has improved corrosion resistance, utilizes lesser chip area and can be programmed at a low voltage. The antifuse circuit includes a PMOS transistor with the gate coupled to a drive power voltage terminal and the source coupled to an anti-pad terminal. During programming the PMOS transistor is off and the source receives an alternating current. Programming the antifuse circuit involves trapping a plurality of electron in an STI region as a result of gate-induced drain leakage. The antifuse circuit also includes an NMOS transistor with the drain connected to the drain of the PMOS transistor, the source connected to ground and the gate connected to a program control signal. The antifuse circuit results in reliable fuse programming at a low voltage by using the PMOS transistor as an anti-fuse device.

Abstract: A packing box for an electronic product to protect an electronic product from external impact. The packing box includes a first packing unit to pack an upper part of the product, a second packing unit passing through the first packing unit and joined to a lower part of the first packing unit, to pack a middle part of the product, and a third packing unit passing through the first and second packing units and joined to a lower part of the second packing unit, to pack a lower part of the product. The packing box is readily disassembled and allows the product to be easily repacked.

Abstract: A semiconductor memory device includes a sub memory cell array region having memory cells each connected between word lines extending in a first direction and bit lines extending in a second direction that is orthogonal to the first direction of extension of the word lines and a sub word line driver region disposed at a side of the sub memory cell array region in the first direction and including sub word line drivers that activate the word lines. A sensing region is disposed at a side of the sub memory cell array region in the second direction and including an equalizer that precharges the bit line in response to a signal transferred through a drive signal line and at least one first control signal driver that activates an inverted control signal line in response to a signal transferred through a control signal line. A conjunction region disposed at an intersection between the sub word line driver region and the sensing region, in which the inverted control signal line is connected to the drive signal line.

Abstract: A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.

Abstract: A method to compress exposure data may include converting image data into a plurality of exposure data, generating new exposure data by combining part of the plurality of exposure data or by excluding part of the plurality of exposure data, and compressing the new exposure data. An exposure apparatus may include a conversion unit that converts image data into a plurality of exposure data, a control unit that generates new exposure data by combining part of the plurality of exposure data or by excluding part of the plurality of exposure data, and a compression unit that compresses the new exposure data.

Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

Abstract: A channel allocation method for use in a wireless communication environment, where Wireless Local Area Networks (WLANs) and Wireless Personal Area Networks (WPANs) coexist, includes collecting, at an access point, information on channels used by the WLANs and WPANs, determining available WLAN channels and available WPAN channels based on the channel information, allocating one of the available WLAN channels and one of the available WPAN channels to the access point, and informing the WLANs and WPANs of the allocated WLAN and WPAN channels.

Abstract: It is an aspect of the present invention to provide a wafer bonding apparatus having a pressing apparatus configured to press wafers fixed in a fixing apparatus, wherein the fixing apparatus is configured to allow the pressing apparatus to press the wafers without interference. The wafer bonding apparatus may include an upper wafer and a lower wafer, a support member configured to support the upper wafer and the lower wafer, a push member on the upper wafer, and a fixing apparatus configured to fix the push member to the support member, wherein the push member includes a fixing part extending outward from a periphery of the upper wafer, and the fixing apparatus is coupled to the fixing part. It is also an aspect of the present invention to provide a method for bonding wafers.