Patents by Inventor Junji Ogawa
Junji Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170097795Abstract: In a flash storage system, the amount of write to be performed to a flash memory of a flash storage can be reduced without deteriorating the performance of a storage controller and the flash storage. When the storage controller performs collective write of data including intermittent reads to the flash storage, the storage system issues a compare write request to the flash storage. The flash storage having received the compare write request reads a data before update of the written data range from the flash memory, compares the read data with the written data, and writes only the data having a different content to the flash memory.Type: ApplicationFiled: April 7, 2014Publication date: April 6, 2017Inventors: Tadato NISHINA, Tomohiro YOSHIHARA, Hiroaki AKUTSU, Junji OGAWA, Shunji KAWAMURA
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Publication number: 20170075620Abstract: A storage system according to the present invention has a plurality of flash packages equipped with a deduplication function. When a storage controller transmits a write data and a feature value of write data to a flash package, the flash package compares contents of the write data with data having a same feature value as the feature value of the write data. As a result of the comparison, if there is no corresponding data, the write data is stored in the flash memory, but if there is a corresponding data, the new data will not be stored. Thus, a greater number of data can be stored in the flash memory while preventing deterioration of performance.Type: ApplicationFiled: April 24, 2014Publication date: March 16, 2017Applicant: HITACHI, LTD.Inventors: Akira YAMAMOTO, Junji OGAWA, Norio SHIMOZONO, Yoshihiro YOSHII, Kazuei HIRONAKA, Atsushi KAWAMURA
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Publication number: 20170075615Abstract: A second virtual volume having a plurality of second virtual areas is a clone of a first virtual volume having a plurality of first virtual areas. A first real area is allocated from a pool of real areas and based on storage devices to the first virtual volume. A storage controller allocates a second real area to the second virtual area before a write occurs in the second virtual area corresponding to the first virtual area to which the first real area is allocated. A physical area is allocated to a logical area corresponding to the first real area in each storage device, and data based on user data stored in the first real area is stored in the physical area. Each storage device allocates the physical area allocated to the logical area corresponding to the first real area to a logical area corresponding to the second real area.Type: ApplicationFiled: March 26, 2014Publication date: March 16, 2017Applicant: HITACHI, LTD.Inventors: Miho IMAZAKI, Norio SIMOZONO, Junji OGAWA, Tomohiro YOSHIHARA, Akira YAMAMOTO, Hiroaki AKUTSU
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Publication number: 20170010944Abstract: A storage apparatus includes: a plurality of flash memory devices each including: a plurality of flash memory chips each including a plurality of physical blocks being data erasure units; and a flash controller configured to provide logical storage areas by associating at least one of the plurality of physical blocks with the logical storage areas; and a RAID controller configured to: manage a plurality of virtual drives each including a part of the logical storage areas provided by each of the plurality of flash memory devices; and control the plurality of virtual drives as a RAID group.Type: ApplicationFiled: January 29, 2014Publication date: January 12, 2017Applicant: HITACHI, LTD.Inventors: Hideo SAITO, Junji OGAWA, Hiroaki AKUTSU, Hideyuki KOSEKI, Atsushi KAWAMURA
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Patent number: 9529537Abstract: A storage system comprises a storage comprising a nonvolatile storage medium, and a storage control apparatus for inputting/outputting data to/from the storage. The storage control apparatus comprises a memory for storing management information, which is information used in inputting/outputting data to/from the storage, and a control part for controlling access to the storage. The control part stores the management information, which is stored in the memory, in the storage as a base image, and when the management information is updated subsequent to the base image being stored in the storage, creates a journal comprising information related to this update, and stores the journal in the storage as a journal group which is configured from multiple journals.Type: GrantFiled: January 15, 2015Date of Patent: December 27, 2016Assignee: HITACHI, LTD.Inventors: Atsushi Kawamura, Junji Ogawa
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Publication number: 20160335195Abstract: The present invention provides a storage device adopting a semiconductor device as a storage media having a nonvolatile property and must be erased for writing data, wherein the device divides and manages a logical storage space provided to a higher level device in logical page units, and manages a virtual address space which is a linear address space to which multiple physical blocks of the semiconductor device are mapped. The storage device uses a page mapping table managing a correspondence between a logical page and an address in the virtual address space, and a virtual address configuration information managing a correspondence between an area in the virtual address space and a physical block, in order to manage the correspondence between the respective logical pages and storage areas of the semiconductor device.Type: ApplicationFiled: January 29, 2014Publication date: November 17, 2016Applicant: HITACHI, LTD.Inventors: Atsushi Kawamura, Junji Ogawa
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Publication number: 20160328154Abstract: A storage device provides a logical space based on a storage medium that is configured by a plurality of logical areas to the higher-level apparatus, and a base data range exists in the storage medium for each logical area. The storage device reads the base data from the base data range that is corresponded to a write destination logical area to which the write destination logical address belongs, and creates difference data that is an exclusive OR of first data that is the base data and second data that is any one of data based on write data and the write data. The storage device creates compressed difference data by compressing the difference data, writes the compressed difference data to the storage medium, and associates a difference data range that is a range in which the compressed difference data has been written with the write destination logical area.Type: ApplicationFiled: February 26, 2014Publication date: November 10, 2016Applicant: HITACHI, LTD.Inventors: Nagamasa MIZUSHIMA, Junji OGAWA, Atsushi KAWAMURA
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Patent number: 9477405Abstract: A storage system, which comprises multiple memory cells and a storage controller, wherein the storage controller manages cell mode information, which either directly or indirectly denotes the number of bits to be stored in multiple memory cells. The cell mode information can be changed in accordance with a request from a management system.Type: GrantFiled: February 5, 2015Date of Patent: October 25, 2016Assignee: Hitachi, Ltd.Inventors: Tsukasa Shibayama, Akifumi Suzuki, Nobuhiro Maki, Junji Ogawa, Masayasu Asano
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Publication number: 20160306557Abstract: A storage apparatus is provided with a plurality of nonvolatile semiconductor storage media and a storage controller that is a controller that is coupled to the plurality of semiconductor storage media. The storage controller identifies a first semiconductor storage unit that is at least one semiconductor storage media and a second semiconductor storage unit that is at least one semiconductor storage media and that is provided with a remaining length of life shorter than that of the first semiconductor storage unit based on the remaining life length information that has been acquired. The storage controller moreover identifies a first logical storage region for the first semiconductor storage unit and a second logical storage region that is provided with a write load higher than that of the first logical storage region for the second semiconductor storage unit based on the statistics information that indicates the statistics that is related to a write for every logical storage region.Type: ApplicationFiled: June 24, 2016Publication date: October 20, 2016Applicant: Hitachi, Ltd.Inventors: Hideyuki KOSEKI, Junji OGAWA
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Publication number: 20160259687Abstract: The storage system according to the present invention comprises a controller, and multiple storage device constituting a RAID group. When storing write data to multiple discontinuous areas within stripes of a storage device, the storage system transmits a new data transmission command containing information for specifying the multiple discontinuous areas and a write data to the storage device, and thereafter, receives an intermediate parity generated from multiple write data and data before update of the multiple write data from the storage device, and then transmits the received intermediate parity and an intermediate parity transmission command to the storage device storing the parity.Type: ApplicationFiled: March 28, 2014Publication date: September 8, 2016Applicant: Hitachi, Ltd.Inventors: Tomohiro YOSHIHARA, Akira YAMAMOTO, Shigeo HOMMA, Junji OGAWA
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Patent number: 9411527Abstract: Storage system comprises a second storage apparatus, which is coupled to multiple first storage apparatuses and is of a different type from the first storage apparatuses, and a first control device, which exists either inside or outside of the second storage apparatus. Row of stripes comprising multiple data elements obtained by segmenting a prescribed data unit, and a redundancy code for rebuilding the data elements, is distributively stored in multiple first storage apparatuses, which are more numerous than the total number of stripe data elements, which are either the data elements or redundancy code, in the row of stripes. The row of stripes is configured to enable the rebuilding of the stripe data elements even when a failure has occurred in up to a prescribed allowable number, which is two or more, of the first storage apparatuses storing the stripe data elements of the relevant row of stripes.Type: GrantFiled: May 26, 2015Date of Patent: August 9, 2016Assignee: Hitachi, Ltd.Inventors: Hiroaki Akutsu, Junji Ogawa
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Patent number: 9405478Abstract: A storage apparatus is provided with a plurality of nonvolatile semiconductor storage media and a storage controller that is a controller that is coupled to the plurality of semiconductor storage media. The storage controller identifies a first semiconductor storage unit that is at least one semiconductor storage media and a second semiconductor storage unit that is at least one semiconductor storage media and that is provided with a remaining length of life shorter than that of the first semiconductor storage unit based on the remaining life length information that has been acquired. The storage controller moreover identifies a first logical storage region for the first semiconductor storage unit and a second logical storage region that is provided with a write load higher than that of the first logical storage region for the second semiconductor storage unit based on the statistics information that indicates the statistics that is related to a write for every logical storage region.Type: GrantFiled: February 8, 2012Date of Patent: August 2, 2016Assignee: Hitachi, Ltd.Inventors: Hideyuki Koseki, Junji Ogawa
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Patent number: 9387684Abstract: An object is to prevent the occurrence of contact failure between a cartridge equipped with a recording medium and an ink jet recording apparatus. A bottle body is crushed to reduce the volume thereof when an ink or solvent is sucked out of the bottle body. A bottle has a neck and a mouth. The neck is rigid. The ROM unit records therein an ink or solvent type, a serial number, the capacity of the bottle, and the amount of remaining ink or solvent. The ROM unit has first and second arms, and freely movably attached to the neck by the first and second arms. A positioning hole is formed on a ROM holder body which houses therein a recording medium. The positioning hole positions the ROM holder body in cooperation with a positioning pin of a reservoir.Type: GrantFiled: December 4, 2014Date of Patent: July 12, 2016Assignee: Keyence CorporationInventors: Junji Ogawa, Hiroki Wada, Mamoru Idaka
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Patent number: 9367469Abstract: A cache memory comprises a cache controller and a nonvolatile semiconductor memory as a storage medium. The nonvolatile semiconductor memory comprises multiple blocks, which are data erase units, and each block comprises multiple pages, which are data write and read units. The cache controller receives data and attribute information of the data, and, based on the received attribute information and attribute information of the data stored in the multiple blocks, selects a storage-destination block for storing the received data, and writes the received data to a page inside the selected storage-destination block.Type: GrantFiled: January 31, 2013Date of Patent: June 14, 2016Assignee: Hitachi, Ltd.Inventors: Junji Ogawa, Akifumi Suzuki
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Patent number: 9361033Abstract: A shared device unit, which comprises a storage device, is coupled to a plurality of storage systems. The shared device unit provides a plurality of storage areas, which are based on the storage device, to the plurality of storage systems. Each storage system stores allocation management information which comprises an ID of a storage area provided to thereof among the plurality of storage areas, and provides the storage area corresponded to the ID included in the allocation management information to the host computer coupled thereto among the plurality of host computers.Type: GrantFiled: March 11, 2015Date of Patent: June 7, 2016Assignee: Hitachi, Ltd.Inventors: Miho Imazaki, Shigeo Homma, Hiroaki Akutsu, Yoshiaki Eguchi, Akira Yamamoto, Junji Ogawa
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Patent number: 9343153Abstract: Data capacity efficiency is improved by de-duplicating data assigned with a code that is different for each data. A storage apparatus comprising a flash memory control device equipped with one or more flash memory modules, wherein the flash memory module comprises at least one flash memory chip for providing a storage area, and a controller for controlling writing/reading of data including user data and a guarantee code accompanying the user data to and from the storage area provided by the flash memory chip, wherein the controller respectively divides a plurality of the data having the common user data into the user data and the guarantee code, stores one of the user data in an area of a predetermined unit of the storage area, and links and stores each of the guarantee codes accompanying the plurality of user data in an area of a predetermined unit of the storage area.Type: GrantFiled: July 14, 2015Date of Patent: May 17, 2016Assignee: HITACHI, LTD.Inventors: Atsushi Kawamura, Junji Ogawa
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Patent number: 9335929Abstract: A nonvolatile semiconductor storage system has multiple nonvolatile semiconductor storage media, a control circuit having a media interface group (one or more interface devices) coupled to the multiple nonvolatile semiconductor storage media, and multiple switches. The media interface group and the multiple switches are coupled via data buses, and each switch and each of two or more nonvolatile chips are coupled via a data bus. The switch is configured so as to switch a coupling between a data bus coupled to the media interface group and a data bus coupled to any of multiple nonvolatile chips that are coupled to this switch. The control circuit partitions write-target data into multiple data elements, switches a coupling by controlling the multiple switches, and distributively sends the multiple data elements to multiple nonvolatile chips.Type: GrantFiled: December 17, 2014Date of Patent: May 10, 2016Assignee: Hitachi, Ltd.Inventors: Atsushi Ishikawa, Koji Sonoda, Go Uehara, Junji Ogawa, Hideyuki Koseki
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Patent number: 9317423Abstract: The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus receives a write command to the primary logical volume, a package processor in a flash package allocates first physical area in the flash memory chip to first cache logical area for write data and stores the write data to the allocated first physical area. And when the package processor receives journal data creation command form the processor, allocates the first physical area to second journal area for journal data without storing journal data corresponding to the write data.Type: GrantFiled: January 7, 2013Date of Patent: April 19, 2016Assignee: HITACHI, LTD.Inventors: Kohei Tatara, Akira Yamamoto, Junji Ogawa
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Publication number: 20160011786Abstract: A storage system includes a plurality of storage devices, each including a storage medium and a compression function for data, and a storage controller coupled to the plurality of storage devices. The storage controller includes compression necessity information indicating necessity of compression of the data in a write command to be transmitted to a storage device at a write destination among the plurality of storage devices. The storage device at the write destination writes, when the compression necessity information included in the received write command indicates that compression is unnecessary, the data in the storage medium without compressing the data.Type: ApplicationFiled: July 31, 2013Publication date: January 14, 2016Inventors: Kenta NINOSE, Junji OGAWA
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Patent number: D777250Type: GrantFiled: January 5, 2015Date of Patent: January 24, 2017Assignee: Keyence CorporationInventors: Hiroki Wada, Junji Ogawa