Patents by Inventor Kalpendu Shastri

Kalpendu Shastri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7483597
    Abstract: An optical modulator is formed to include a plurality of separate electrodes disposed along one arm, the electrodes having different lengths and driven with different signals to provide for multi-level signaling (e.g., PAM-4 signaling). By using separate drivers to energize the different sections, the number of sections energized at a given point in time will define the net phase shift introduced to the optical signal. The total length of the combined modulator sections is associated with a ? phase shift (180°). Each section is driven by either a digital “one” or “zero”, so as to create the multi-level modulation. An essentially equal change in power between adjacent transmitted symbols is accomplished by properly adjusting the lengths of each individual section.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: January 27, 2009
    Assignee: Lightwire, Inc.
    Inventors: Kalpendu Shastri, Bipin Dama
  • Patent number: 7447395
    Abstract: A silicon-based optical modulator structure includes one or more separate localized heating elements for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations in device performance. Heating is provided by thermo-optic devices such as, for example, silicon-based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator. The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding area. The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area. Control of the applied DC voltage results in controlling the refractive index.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: November 4, 2008
    Assignee: SiOptical, Inc.
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Paulius Mindaugas Mosinskis, Vipulkumar Patel, Kalpendu Shastri, Mark Webster
  • Patent number: 7440703
    Abstract: An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: October 21, 2008
    Assignee: SiOptical, Inc.
    Inventors: Kalpendu Shastri, Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20080253713
    Abstract: An arrangement for providing optical crossovers between waveguides formed in an SOI-based structure utilize a patterned geometry in the SOI structure that is selected to reduce the effects of crosstalk in the area where the signals overlap. Preferably, the optical signals are fixed to propagate along orthogonal directions (or are of different wavelengths) to minimize the effects of crosstalk. The geometry of the SOI structure is patterned to include predetermined tapers and/or reflecting surfaces to direct/shape the propagating optical signals. The patterned waveguide regions within the optical crossover region may be formed to include overlying polysilicon segments to further shape the propagating beams and improve the coupling efficiency of the crossover arrangement.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 16, 2008
    Inventors: David Piede, Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Publication number: 20080095486
    Abstract: An optical modulator is formed to include a plurality of separate electrodes disposed along one arm, the electrodes having different lengths and driven with different signals to provide for multi-level signaling (e.g., PAM-4 signaling). By using separate drivers to energize the different sections, the number of sections energized at a given point in time will define the net phase shift introduced to the optical signal. The total length of the combined modulator sections is associated with a ? phase shift (180°). Each section is driven by either a digital “one” or “zero”, so as to create the multi-level modulation. An essentially equal change in power between adjacent transmitted symbols is accomplished by properly adjusting the lengths of each individual section.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 24, 2008
    Inventors: Kalpendu Shastri, Bipin Dama
  • Patent number: 7358585
    Abstract: A silicon-based IR photodetector is formed within a silicon-on-insulator (SOI) structure by placing a metallic strip (preferably, a silicide) over a portion of an optical waveguide formed within a planar silicon surface layer (i.e., “planar SOI layer”) of the SOI structure, the planar SOI layer comprising a thickness of less than one micron. Room temperature operation of the photodetector is accomplished as a result of the relatively low dark current associated with the SOI-based structure and the ability to use a relatively small surface area silicide strip to collect the photocurrent. The planar SOI layer may be doped, and the geometry of the silicide strip may be modified, as desired, to achieve improved results over prior art silicon-based photodetectors.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: April 15, 2008
    Assignee: SiOptical, Inc.
    Inventors: Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7327911
    Abstract: An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: February 5, 2008
    Assignee: SiOptical, Inc.
    Inventors: David Piede, Kalpendu Shastri, Robert Keith Montgomery, Prakash Gothoskar, Vipulkumar Patel, Mary Nadeau
  • Publication number: 20080007295
    Abstract: A CMOS driver circuit is configured to provide a tri-state condition after a predetermined number of like-valued data bits have been transmitted, reducing the presence of intersymbol interference (ISI) along a transmission channel. In situations where the transmission channel is bandwidth-limited, the use of the tri-stating technique allows for the complete transition to the supply rails during the given bit period.
    Type: Application
    Filed: May 25, 2007
    Publication date: January 10, 2008
    Inventor: Kalpendu Shastri
  • Publication number: 20070292075
    Abstract: A silicon-based optical modulator structure includes one or more separate localized heating elements for changing the refractive index of an associated portion of the structure and thereby providing corrective adjustments to address unwanted variations in device performance. Heating is provided by thermo-optic devices such as, for example, silicon-based resistors, silicide resistors, forward-biased PN junctions, and the like, where any of these structures may easily be incorporated with a silicon-based optical modulator. The application of a DC voltage to any of these structures will generate heat, which then transfers into the waveguiding area. The increase in local temperature of the waveguiding area will, in turn, increase the refractive index of the waveguiding in the area.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 20, 2007
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Paulius Mindaugas Mosinskis, Vipulkumar Patel, Kalpendu Shastri, Mark Webster
  • Patent number: 7298949
    Abstract: An SOI-based photonic bandgap (PBG) electro-optic device utilizes a patterned PBG structure to define a two-dimensional waveguide within an active waveguiding region of the SOI electro-optic device. The inclusion of the PBG columnar arrays within the SOI structure results in providing extremely tight lateral confinement of the optical mode within the waveguiding structure, thus significantly reducing the optical loss. By virtue of including the PBG structure, the associated electrical contacts may be placed in closer proximity to the active region without affecting the optical performance, thus increasing the switching speed of the electro-optic device. The overall device size, capacitance and resistance are also reduced as a consequence of using PBGs for lateral mode confinement.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: November 20, 2007
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, David Piede, Kalpendu Shastri, Katherine A. Yanushefski
  • Patent number: 7269809
    Abstract: Computer-aided design (CAD) tools are used to perform the integrated design, verification and layout of electrical and optical components in a monolithic, silicon-based electro-optic chip. Separate top-level behavioral logic designs are prepared for the three different types of elements included within the final, silicon-based monolithic structure: (1) digital electronic integrated circuit elements; (2) analog/mixed signal electronic integrated circuit elements; and (3) opto-electronic elements (including passive and active optical elements). Once the behavioral logic design is completed, the results are combined and co-simulated. A physical layout design is developed and verified for each different type of element in the circuit. The separate physical layouts are then co-verified, to assess the properties of the overall physical design.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: September 11, 2007
    Assignee: SiOptical, Inc.
    Inventors: Kalpendu Shastri, Soham Pathak, Prakash Gothoskar, Paulius Mosinskis, Bipin Dama
  • Patent number: 7187837
    Abstract: An arrangement for actively controlling, in two dimensions, the manipulation of light within an SOI-based optical structure utilizes doped regions formed within the SOI layer and a polysilicon layer of a silicon-insulator-silicon capacitive (SISCAP) structure. The regions are oppositely doped so as to form an active device, where the application of a voltage potential between the oppositely doped regions functions to modify the refractive index in the affected area and alter the properties of an optical signal propagating through the region. The doped regions may be advantageously formed to exhibit any desired “shaped” (such as, for example, lenses, prisms, Bragg gratings, etc.), so as to manipulate the propagating beam as a function of the known properties of these devices. One or more active devices of the present invention may be included within a SISCAP formed, SOI-based optical element (such as, for example, a Mach-Zehnder interferometer, ring resonator, optical switch, etc.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: March 6, 2007
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20060245761
    Abstract: An electronic dispersion compensation (EDC) arrangement for a multi-channel optical receive utilizes a time division technique to “share” a common adaptive algorithm block between a plurality of N separate channels. The algorithm block embodies a specific algorithm associated with correcting/updating tap weights for the delay lines forming the equalizing elements, and a time slot assignment element is used in conjunction with the algorithm block to control the access of the various channels to the algorithm block. In situations where certain channels experience a greater degree of dispersion than others, the time slot assignment element may be configured to allot a greater number of time slots to the affected channels.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 2, 2006
    Inventors: Kalpendu Shastri, Bipin Dama, David Piede
  • Patent number: 7113676
    Abstract: A planar optical isolator is formed within the silicon surface layer of an SOI structure. A forward-directed signal is applied to an input waveguiding section of the isolator and thereafter propagates through a non-reciprocal waveguide coupling region into an output waveguide section. A rearward-directed signal enters via the output waveguide section and is thereafter coupled into the non-reciprocal waveguide structure, where the geometry of the structure functions to couple only a small amount of the reflected signal into the input waveguide section. In one embodiment, the non-reciprocal structure comprises an N-way directional coupler (with one output waveguide, one input waveguide and N?1 isolating waveguides).
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: September 26, 2006
    Inventors: David Piede, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski, Harvey Wagner
  • Patent number: 7109739
    Abstract: A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: September 19, 2006
    Assignee: SiOptical, Inc.
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, David Piede, Katherine A. Yanushefski
  • Publication number: 20060177173
    Abstract: A vertical stack of integrated circuits includes at least one CMOS electronic integrated circuit (IC), an SOI-based opto-electronic integrated circuit structure, and an optical input/output coupling element. A plurality of metalized vias may be formed through the thickness of the stack so that electrical connections can be made between each integrated circuit. Various types of optical input/output coupling can be used, such as prism coupling, gratings, inverse tapers, and the like. By separating the optical and electrical functions onto separate ICs, the functionalities of each may be modified without requiring a re-design of the remaining system. By virtue of using SOI-based opto-electronics with the CMOS electronic ICs, a portion of the SOI structure may be exposed to provide access to the waveguiding SOI layer for optical coupling purposes.
    Type: Application
    Filed: February 3, 2006
    Publication date: August 10, 2006
    Inventors: Kalpendu Shastri, Vipulkumar Patel, David Piede, John Fangman
  • Publication number: 20060140645
    Abstract: An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.
    Type: Application
    Filed: February 22, 2006
    Publication date: June 29, 2006
    Inventors: Kalpendu Shastri, Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Montgomery, Soham Pathak, Katherine Yanushefski
  • Patent number: 7065301
    Abstract: An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: June 20, 2006
    Assignee: SiOptical, Inc.
    Inventors: Kalpendu Shastri, Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20060126993
    Abstract: An SOI-based optical interconnection arrangement is provided that significantly reduces the size, complexity and power consumption requires of conventional high density electrical interconnections. In particular, a group of optical modulators and wavelength division multiplexers/demultiplexers are used in association with traditional electrical signal paths to “concentrate” a large number of the electrical-pinouts onto one optical waveguide (e.g., fiber). By utilizing a number of such SOI-based signal concentration structures, an optical backplane can be formed that couples all of these concentration structures through one optical substrate and then onto a separate number of output/receiving boards. Additionally, optical gain material may be embedded within the backplane element to further enhance the optical signal quality.
    Type: Application
    Filed: November 25, 2005
    Publication date: June 15, 2006
    Inventors: David Piede, Bipin Dama, Kalpendu Shastri, John Fangman, Harvey Wagner, Margaret Ghiron
  • Patent number: 7058261
    Abstract: An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index “seen” by the multi-wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the “prism coupling surface”).
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: June 6, 2006
    Assignee: SiOptical, Inc.
    Inventors: Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski