Patents by Inventor Kalpendu Shastri

Kalpendu Shastri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050094939
    Abstract: An arrangement for achieving and maintaining high efficiency coupling of light between a multi-wavelength optical signal and a relatively thin (e.g., sub-micron) silicon optical waveguide uses a prism coupler in association with an evanescent coupling layer. A grating structure having a period less than the wavelengths of transmission is formed in the coupling region (either formed in the silicon waveguide, evanescent coupling layer, prism coupler, or any combination thereof) so as to increase the effective refractive index “seen” by the multi-wavelength optical signal in the area where the beam exiting/entering the prism coupler intercepts the waveguide surface (referred to as the “prism coupling surface”).
    Type: Application
    Filed: September 7, 2004
    Publication date: May 5, 2005
    Inventors: Margaret Ghiron, Prakash Gothoskar, Robert Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine Yanushefski
  • Publication number: 20050094938
    Abstract: A coupling arrangement for allowing multiple wavelengths to be coupled into and out of a relatively thin silicon optical waveguide layer utilizes a diffractive optical element, in the form of a volume phase grating, in combination with a prism coupling structure. The diffractive optical element is formed to comprise a predetermined modulation index sufficient to diffract the various wavelengths through angles associated with improving the coupling efficiency of each wavelength into the silicon waveguide. The diffractive optical element may be formed as a separate element, or formed as an integral part of the coupling facet of the prism coupler.
    Type: Application
    Filed: September 7, 2004
    Publication date: May 5, 2005
    Inventors: Margaret Ghiron, Prakash Gothoskar, Robert Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine Yanushefski
  • Patent number: 6845198
    Abstract: A silicon-based electro-optic modulator is based on forming a gate region of a first conductivity to partially overly a body region of a second conductivity type, with a relatively thin dielectric layer interposed between the contiguous portions of the gate and body regions. The modulator may be formed on an SOI platform, with the body region formed in the relatively thin silicon surface layer of the SOI structure and the gate region formed of a relatively thin silicon layer overlying the SOI structure. The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in this active device region. The application of a modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric at the same time, resulting in high speed operation.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: January 18, 2005
    Assignee: SiOptical, Inc.
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040258347
    Abstract: A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.
    Type: Application
    Filed: April 23, 2004
    Publication date: December 23, 2004
    Inventors: Prakash Gothoskar, Margaret Ghiron, Robert Keith Montgomery, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040223768
    Abstract: An electro-optic modulator arrangement for achieving switching speeds greater than 1 Gb/s utilizes pre-emphasis pulses to accelerate the change in refractive index of the optical waveguide used to form the electro-optic modulator. In one embodiment, a feedback loop may be added to use a portion of the modulated optical output signal to adjust the magnitude and duration of the pre-emphasis pulses, as well as the various reference levels used for modulated. For free carrier-based electro-optic modulators, including silicon-based electro-optic modulators, the pre-emphasis pulses are used to accelerate the movement of free carriers at the transitions between input signal data values.
    Type: Application
    Filed: May 10, 2004
    Publication date: November 11, 2004
    Inventors: Kalpendu Shastri, Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040213518
    Abstract: An optical coupling system for use with multiple wavelength optical signals provides improved coupling efficiency between a free-space optical beam and a relatively thin, surface layer of an SOI structure (“SOI layer”), allowing for sufficient coupling efficiency (greater than 50%) over a predetermined wavelength range. An evanescent coupling layer, disposed between a coupling prism and an SOI layer, is particularly configured to improve the coupling efficiency. In one embodiment, the thickness of the evanescent layer is reduced below an optimum value for a single wavelength, the reduced thickness improving coupling efficiency over a predetermined wavelength range around a defined center wavelength. Alternatively, a tapered thickness evanescent coupling layer may be used to improve coupling efficiency (or a combination of reduced thickness and tapered configuration).
    Type: Application
    Filed: April 28, 2004
    Publication date: October 28, 2004
    Inventors: Margaret Ghiron, Parkash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Publication number: 20040208454
    Abstract: A silicon-based electro-optic modulator is based on forming a gate region of a first conductivity to partially overly a body region of a second conductivity type, with a relatively thin dielectric layer interposed between the contiguous portions of the gate and body regions. The modulator may be formed on an SOI platform, with the body region formed in the relatively thin silicon surface layer of the SOI structure and the gate region formed of a relatively thin silicon layer overlying the SOI structure. The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in this active device region. The application of a modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric at the same time, resulting in high speed operation.
    Type: Application
    Filed: March 8, 2004
    Publication date: October 21, 2004
    Inventors: Robert Keith Montgomery, Margaret Ghiron, Prakash Gothoskar, Vipulkumar Patel, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040207016
    Abstract: A conventional CMOS fabrication technique is used to integrate the formation of passive optical devices and active electro-optic devices with standard CMOS electrical devices on a common SOI structure. The electrical devices and optical devices share the same surface SOI layer (a relatively thin, single crystal silicon layer), with various required semiconductor layers then formed over the SOI layer. In some instances, a set of process steps may be used to simultaneously form regions in both electrical and optical devices. Advantageously, the same metallization process is used to provide electrical connections to the electrical devices and the active electro-optic devices.
    Type: Application
    Filed: April 21, 2004
    Publication date: October 21, 2004
    Inventors: Vipulkumar Patel, Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040205684
    Abstract: A system and method for providing the layout of non-Manhattan shaped integrated circuit elements using a Manhattan layout system utilizes a plurality of minimal sized polygons (e.g., rectangles) to fit within the boundaries of the non-Manhattan element. The rectangles are fit such that at least one vertex of each rectangle coincides with a grid point on the Manhattan layout system. Preferably, the rectangles are defined by using the spacing being adjacent grid points as the height of each rectangle. As the distance between adjacent grid points decreases, the layout better matches the actual shape of the non-Manhattan element. The system and method then allows for electrical and optical circuit elements to be laid out simultaneously, using the same layout software and equipment.
    Type: Application
    Filed: April 8, 2004
    Publication date: October 14, 2004
    Inventors: Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040202440
    Abstract: A low loss coupling arrangement between a slab/strip waveguide and a rib waveguide in an optical waveguiding structure formed on a silicon-on-insulator (SOI) platform utilizes tapered sections at the input and/or output of the rib waveguide to reduce loss. Optical reflections are reduced by using silicon tapers (either vertical tapers, horizontal tapers, or two-dimensional tapers) that gradually transition the effective index seen by an optical signal propagating along the slab/strip waveguide and subsequently into and out of the rib waveguide. Loss can be further reduced by using adiabatically contoured silicon regions at the input and output of the rib waveguide to reduce mode mismatch between the slab/strip waveguide and rib waveguide. In a preferred embodiment, concatenated tapered and adiabatic sections can be used to provide for reduced optical reflection loss and reduced optical mode mismatch.
    Type: Application
    Filed: April 5, 2004
    Publication date: October 14, 2004
    Inventors: Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski
  • Publication number: 20040202418
    Abstract: A practical realization for achieving and maintaining high-efficiency transfer of light from input and output free-space optics to a high-index waveguide of sub-micron thickness is described. The required optical elements and methods of fabricating, aligning, and assembling these elements are discussed. Maintaining high coupling efficiency reliably over realistic ranges of device operating parameters is discussed in the context of the preferred embodiments.
    Type: Application
    Filed: November 24, 2003
    Publication date: October 14, 2004
    Inventors: Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Publication number: 20040190826
    Abstract: A trapezoidal shaped single-crystal silicon prism is formed and permanently attached to an SOI wafer, or any structure including a silicon optical waveguide. In order to provide efficient optical coupling, the dopant species and concentration within the silicon waveguide is chosen such that the refractive index of the silicon waveguide is slightly less than that of the prism coupler (refractive index of silicon≈3.5). An intermediate evanescent coupling layer, disposed between the waveguide and the prism coupler, comprises a refractive index less than both the prism and the waveguide. In one embodiment, the evanescent coupling layer comprises a constant thickness. In an alternative embodiment, the evanescent coupling layer may be tapered to improve coupling efficiency between the prism and the waveguide. Methods of making the coupling arrangement are also disclosed.
    Type: Application
    Filed: September 23, 2003
    Publication date: September 30, 2004
    Inventors: Margaret Ghiron, Prakash Gothoskar, Robert Keith Montgomery, Vipulkumar Patel, Soham Pathak, Kalpendu Shastri, Katherine A. Yanushefski
  • Publication number: 20040188794
    Abstract: A photodetector for use with relatively thin (i.e., sub-micron) silicon optical waveguides formed in a silicon-on-insulator (SOI) structure comprises a layer of poly-germanium disposed to couple at least a portion of the optical signal propagating along the silicon optical waveguide. Tight confinement of the optical signal within the waveguide structure allows for efficient evanescent coupling into the poly-germanium detector. The silicon optical waveguide may comprise any desired geometry, with the poly-germanium detector formed to either cover a portion of the waveguide, or be butt-coupled to an end portion of the waveguide. When covering a portion of the waveguide, poly-germanium detector may comprise a “wrap-around” geometry to cover the side and top surfaces of the optical waveguide, with electrical contacts formed at opposing ends of the detector.
    Type: Application
    Filed: February 5, 2004
    Publication date: September 30, 2004
    Inventors: Prakash Gothoskar, Margaret Ghiron, Vipulkumar Patel, Robert Keith Montgomery, Kalpendu Shastri, Soham Pathak, Katherine A. Yanushefski