Patents by Inventor Kambhampati Ramakrishna

Kambhampati Ramakrishna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8581375
    Abstract: A heat spreader frame is provided including: heat spreaders having upper surfaces; a peripheral frame surrounding the heat spreaders; spreaders, the peripheral frame having stand-off legs; tie bars having upper surfaces and a pin identifier at an end portion of the tie bars, the heat spreaders connected to one another and to the peripheral frame by the tie bars, the width of the stand-off legs wider than widths of the tie bars; at least portions of the upper surfaces of the tie bars being thinned to reduce heights of the tie bars; the upper surfaces of the heat spreader in an elevated position supported by the peripheral frame; and the heat spreaders and the tie bars covered by an package molding compound exposing the upper surface of the heat spreaders and one surface of the pin identifier coplanar to the upper surfaces of the heat spreaders.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: November 12, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Diane Sahakian, Il Kwon Shim
  • Patent number: 8558399
    Abstract: A dual molded multi-chip package system is provided including forming an embedded integrated circuit package system having a first encapsulation partially covering a first integrated circuit die and a lead connected thereto, mounting a semiconductor device over the first encapsulation and connected to the lead, and forming a second encapsulation over the semiconductor device and the embedded integrated circuit package system.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: October 15, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
  • Patent number: 8395251
    Abstract: An integrated circuit package to package stacking system is provided including providing a first integrated circuit package, having a configured leadframe, providing a second integrated circuit package, having the configured leadframe, and forming an integrated circuit package pair by electrically connecting the configured leadframe of the first integrated circuit package to the configured leadframe of the second integrated circuit package.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: March 12, 2013
    Assignee: STATS ChipPac Ltd.
    Inventors: Il Kwon Shim, Seng Guan Chow, Jeffrey D. Punzalan, Byung Joon Han, Kambhampati Ramakrishna
  • Patent number: 8309397
    Abstract: A method for fabricating an encapsulant cavity integrated circuit package system includes: providing an interposer; forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and the interposer; and attaching a component on the interposer in the encapsulant cavity.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: November 13, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow
  • Publication number: 20120241929
    Abstract: A heat spreader frame is provided including: heat spreaders having upper surfaces; a peripheral frame surrounding the heat spreaders; spreaders, the peripheral frame having stand-off legs; tie bars having upper surfaces and a pin identifier at an end portion of the tie bars, the heat spreaders connected to one another and to the peripheral frame by the tie bars, the width of the stand-off legs wider than widths of the tie bars; at least portions of the upper surfaces of the tie bars being thinned to reduce heights of the tie bars; the upper surfaces of the heat spreader in an elevated position supported by the peripheral frame; and the heat spreaders and the tie bars covered by an package molding compound exposing the upper surface of the heat spreaders and one surface of the pin identifier coplanar to the upper surfaces of the heat spreaders.
    Type: Application
    Filed: June 8, 2012
    Publication date: September 27, 2012
    Inventors: Kambhampati Ramakrishna, Diane Sahakian, IL Kwon Shim
  • Publication number: 20120193805
    Abstract: A dual molded multi-chip package system is provided including forming an embedded integrated circuit package system having a first encapsulation partially covering a first integrated circuit die and a lead connected thereto, mounting a semiconductor device over the first encapsulation and connected to the lead, and forming a second encapsulation over the semiconductor device and the embedded integrated circuit package system.
    Type: Application
    Filed: April 10, 2012
    Publication date: August 2, 2012
    Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
  • Patent number: 8211753
    Abstract: A method for fabricating a heat spreader is provided. Heat spreaders are formed and surrounded by a frame. The heat spreaders and frame are connected to one another by tie bars, the heat spreaders and tie bars having respective upper surfaces. At least portions of the upper surfaces of the tie bars are thinned to reduce the heights of the tie bars at least on a singulation line thereon. The frame is formed to support the heat spreader upper surfaces in an elevated position with respect thereto.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: July 3, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Diane Sahakian, Il Kwon Shim
  • Patent number: 8178982
    Abstract: A dual molded multi-chip package system is provided including forming an embedded integrated circuit package system having a first encapsulation partially covering a first integrated circuit die and a lead connected thereto, mounting a semiconductor device over the first encapsulation and connected to the lead, and forming a second encapsulation over the semiconductor device and the embedded integrated circuit package system.
    Type: Grant
    Filed: December 30, 2006
    Date of Patent: May 15, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
  • Patent number: 8106496
    Abstract: A semiconductor package comprises a semiconductor component (e.g., a die) and a via at least partially covered by an encapsulant. The encapsulant forms substantially parallel top and bottom surfaces, with at least part of the via being exposed on the top surface. At least one conductive pad is exposed on the bottom surface, and the via can electrically couple the top and bottom surfaces, as well as couple the semiconductor component at the top and bottom surfaces. An additional semiconductor component can be coupled to the top surface with a circuit pattern formed on the top surface and coupled to the via.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac, Inc.
    Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
  • Publication number: 20120007217
    Abstract: A method for fabricating an encapsulant cavity integrated circuit package system includes: providing an interposer; forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and the interposer; and attaching a component on the interposer in the encapsulant cavity.
    Type: Application
    Filed: September 19, 2011
    Publication date: January 12, 2012
    Inventors: Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow
  • Patent number: 8050047
    Abstract: An integrated circuit package system includes: providing a flexible circuit substrate having a fold; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a recessed encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: November 1, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Seng Guan Chow, Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna
  • Patent number: 8031475
    Abstract: An integrated circuit package system includes: providing a flexible circuit substrate; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a mounded encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: October 4, 2011
    Assignee: STATS Chippac, Ltd.
    Inventors: Seng Guan Chow, Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna
  • Patent number: 8021924
    Abstract: A method for fabricating an encapsulant cavity integrated circuit package system includes: forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: September 20, 2011
    Assignee: STATS ChipPAC Ltd.
    Inventors: Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow
  • Publication number: 20110018084
    Abstract: A method for fabricating an encapsulant cavity integrated circuit package system includes: forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 27, 2011
    Inventors: Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow
  • Patent number: 7863730
    Abstract: A method for forming a heat spreader, and the heat spreader formed thereby, are disclosed. An array heat spreader having a plurality of connected heat spreader panels is formed. Slots are formed in opposing sides of the heat spreader panels. Legs are formed on and extending downwardly from each of the heat spreader panels in at least an opposing pair of the slots on the heat spreader panels. The legs are integral with the respective heat spreader panels from which they depend.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: January 4, 2011
    Assignee: ST Assembly Test Services Ltd.
    Inventors: Il Kwon Shim, Kambhampati Ramakrishna, Diane Sahakian, Seng Guan Chow, Dario S. Filoteo, Jr., Virgil Cotoco Ararao
  • Patent number: 7855100
    Abstract: An encapsulant cavity integrated circuit package system including forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: December 21, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Il Kwon Shim, Byung Joon Han, Kambhampati Ramakrishna, Seng Guan Chow
  • Patent number: 7795078
    Abstract: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: September 14, 2010
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Kambhampati Ramakrishna, Seng Guan Chow
  • Patent number: 7790504
    Abstract: An integrated circuit package system is provided providing a first structure, forming a compression via in the first structure, forming a stud bump on a second structure and pressing the stud bump into the compression via forming a mechanical bond.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 7, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Byung Joon Han, Seng Guan Chow
  • Patent number: 7622800
    Abstract: A stackable semiconductor package and method includes providing a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads. A second semiconductor package having a second plurality of lower leads is provided. The second plurality of lower leads is attached to the first plurality of upper leads to form a stack of semiconductor packages.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: November 24, 2009
    Assignee: Stats Chippac Ltd.
    Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
  • Publication number: 20090263937
    Abstract: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board.
    Type: Application
    Filed: May 28, 2009
    Publication date: October 22, 2009
    Inventors: Kambhampati Ramakrishna, Seng Guan Chow