Abstract: A semiconductor package is provided. A semiconductor package has a die pad and a plurality of bonding fingers. A spacer is attached to the die pad, and a large die is attached to the spacer. The large die is wire bonded to the plurality of bonding fingers using a plurality of bonding wires. The die pad, plurality of bonding fingers, spacer, large die, and bonding wires are encapsulated to form the semiconductor package. The semiconductor package can be either a single or dual row package, such as a QFN or BGA package.

Abstract: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board.

Abstract: An integrated circuit package system includes: providing a flexible circuit substrate having a fold; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a recessed encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.

Abstract: An integrated circuit package system includes: providing a flexible circuit substrate; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a mounded encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.

Abstract: A semiconductor package comprises a semiconductor component (e.g., a die) and a via at least partially covered by an encapsulant. The encapsulant forms substantially parallel top and bottom surfaces, with at least part of the via being exposed on the top surface. At least one conductive pad is exposed on the bottom surface, and the via can electrically couple the top and bottom surfaces, as well as couple the semiconductor component at the top and bottom surfaces. An additional semiconductor component can be coupled to the top surface with a circuit pattern formed on the top surface and coupled to the via.

Abstract: Semiconductor assemblies include a first package, each having at least one die affixed to, and electrically interconnected with, a die attach side of the first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the molding of the first package with the first side of the second substrate facing the die attach side of the first package substrate. Z-interconnection of the package and the substrate is by wire bonds connecting the first and second substrates. The assembly is encapsulated with both the land side of the second substrate and a portion of the land side of the first package substrate exposed, so that second level interconnection and interconnection with additional components may be made.

Abstract: An encapsulant cavity integrated circuit package system including forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.

Abstract: A method of manufacturing a pre-molded leadframe for use in a semiconductor package includes providing a leadframe having a die pad and a plurality of leads. A first molding material is formed in the leadframe to expose the upper surface of the die pad and the upper surfaces of the plurality of leads.

Abstract: A cavity semiconductor package has a pre-molded leadframe construction. The leadframe is formed by molding around a die pad, and plural terminal lands. The leadframe has a hole for an acoustic port, such that the package can be soldered on a back side of a printed circuit board and have air access to a sensor die in the package from a front side of the printed circuit board via the acoustic port. The leadframe may also have a hollow or concave recess that defines an acoustic cavity in conjunction with the sensor die or printed circuit board.

Abstract: A dual molded multi-chip package system is provided including forming an embedded integrated circuit package system having a first encapsulation partially covering a first integrated circuit die and a lead connected thereto, mounting a semiconductor device over the first encapsulation and connected to the lead, and forming a second encapsulation over the semiconductor device and the embedded integrated circuit package system.

Abstract: Stacked package assemblies include first and second stacked packages, each having at least one die affixed to, and electrically interconnected with, a die attach side of the package substrate. One package is inverted in relation to the other, that is, the die attach sides of the package substrates face one another, and the “land” sides of the substrates face away from one another. Z-interconnection of the packages is by wire bonds connecting the first and second package substrates. The assembly is encapsulated in such a way that both the second package substrate (one side of the assembly) and a portion of the first package substrate (on the opposite side of the assembly) are exposed, so that second level interconnection and interconnection with additional components may be made. One or more additional components may be stacked over the land side of the first package substrate.

Abstract: An encapsulant cavity integrated circuit package system including forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.

Abstract: A stacked semiconductor package includes a substrate and a first semiconductor device on the substrate. An interposer is supported above the first semiconductor device opposite the substrate. The interposer is electrically connected to the substrate. A second semiconductor device is mounted on the interposer.

Abstract: A stackable semiconductor package and method includes providing a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads. A second semiconductor package having a second plurality of lower leads is provided. The second plurality of lower leads is attached to the first plurality of upper leads to form a stack of semiconductor packages.

Abstract: An integrated circuit package system is provided providing a first structure, forming a compression via in the first structure, forming a stud bump on a second structure and pressing the stud bump into the compression via forming a mechanical bond.

Abstract: A stackable semiconductor package and method includes providing a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads. A second semiconductor package having a second plurality of lower leads is provided. The second plurality of lower leads is attached to the first plurality of upper leads to form a stack of semiconductor packages.

Abstract: An integrated circuit package to package stacking system is provided including providing a first integrated circuit package, having a configured leadframe, providing a second integrated circuit package, having the configured leadframe, and forming an integrated circuit package pair by electrically connecting the configured leadframe of the first integrated circuit package to the configured leadframe of the second integrated circuit package.

Abstract: A method of manufacturing a pre-molded leadframe for use in a semiconductor package includes providing a leadframe having a die pad and a plurality of leads. A first molding material is formed in the leadframe to expose the upper surface of the die pad and the upper surfaces of the plurality of leads.

Abstract: A method of manufacturing a pre-molded leadframe for use in a semiconductor package includes providing a leadframe having a die pad and a plurality of terminal leads. A first molding material is formed in the leadframe to expose the upper surface of the die pad and the upper surfaces of the plurality of terminal leads. A die is connected to die pad and the plurality of terminal leads.

Abstract: Semiconductor assemblies include a first package, each having at least one die affixed to, and electrically interconnected with, a die attach side of the first package substrate, and a second substrate having a first side and a second (“land”) side, mounted over the molding of the first package with the first side of the second substrate facing the die attach side of the first package substrate. Accordingly, the die attach sides of the first substrate and the first side of the second substrate face one another, and the “land” sides of the substrates face away from one another. Z-interconnection of the package and the substrate is by wire bonds connecting the first and second substrates. The assembly is encapsulated in such a way that both the land side of the second substrate (one side of the assembly) and a portion of the land side of the first package substrate (on the opposite side of the assembly) are exposed, so that second level interconnection and interconnection with additional components may be made.