Patents by Inventor Kang Huang

Kang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200337304
    Abstract: Rechargeable antimicrobial materials that can provide continuous sanitation of contact surfaces or liquids are provided that are based on functionalized sanitization particles that are either freestanding or coupled to a surface film. The sanitization particles have a carrier particle and one or more antimicrobial agents loaded into, adsorbed onto or bonded to each carrier particle. The antimicrobial agents may also be joined to a polymer or particulates of clay or zeolite that are coupled to the carrier. Sanitization particles may also be coupled directly to a film or through a chemical linker. The particles and films provide methods of enhanced inactivation of antibiotic resistant bacteria, inactivation and dissipation of biofilms, and the reduction or elimination of bacterial pathogens from surfaces, medical devices, on food or in food containers.
    Type: Application
    Filed: May 11, 2020
    Publication date: October 29, 2020
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Nitin Nitin, Kang Huang
  • Publication number: 20200312770
    Abstract: Board substrates, three-dimensional integrated circuit structures and methods of forming the same are disclosed. A board substrate includes a core layer, a first build-up layer, a second build-up layer, a first group of bumps, a second first group of bumps and at least one first underfill blocking wall. The first build-up layer and the second build-up layer are disposed on opposite sides of the core layer. The first group of bumps is disposed over the first build-up layer. The second first group of bumps is disposed over the first build-up layer. The at least one first underfill blocking wall is disposed over the first build-up layer and between the first group of bumps and the second group of bumps.
    Type: Application
    Filed: September 5, 2019
    Publication date: October 1, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Yu Lu, Ping-Kang Huang, Sao-Ling Chiu
  • Publication number: 20200209297
    Abstract: A test device includes a first connector, a second connector, a first power direction control circuit electrically connected to the first connector, a second power direction control circuit electrically connected to the first power direction control circuit through a power transmission circuit, and a detecting module electrically connected to the power transmission circuit and detecting the electric energy transmitted by the power transmission circuit. The second power direction control circuit is electrically connected to the second connector. The power sourcing device transmits the power to the powered device through the first connector. The first power direction control circuit, the power transmission circuit, the second power direction control circuit, and the second connector of the test device.
    Type: Application
    Filed: March 12, 2019
    Publication date: July 2, 2020
    Inventor: TSE-KANG HUANG
  • Patent number: 10668592
    Abstract: A method of planarizing a wafer includes pressing the wafer against a planarization pad. The method further includes moving the planarization pad relative to the wafer. The method further includes conditioning the planarization pad using a pad conditioner. Conditioning the planarization pad includes moving the planarization pad relative to the pad conditioner. The pad conditioner includes abrasive particles having aligned tips a substantially constant distance from a surface of substrate of the pad conditioner.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Bo-I Lee, Soon-Kang Huang, Chi-Ming Yang, Chin-Hsiang Lin
  • Publication number: 20200126938
    Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.
    Type: Application
    Filed: December 17, 2019
    Publication date: April 23, 2020
    Inventors: Shang-Yun Hou, Sao-Ling Chiu, Ping-Kang Huang, Wen-Hsin Wei, Wen-Chih Chiou, Shin-Puu Jeng, Bruce C.S. Chou
  • Patent number: 10529679
    Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a method of forming a semiconductor device, the method comprising forming a conductive pad in a first substrate, forming an interconnecting structure over the conductive pad and the first substrate, the interconnecting structure comprising a plurality of metal layers disposed in a plurality of dielectric layers, bonding a die to a first side of the interconnecting structure, and etching the first substrate from a second side of the interconnecting structure, the etching exposing a portion of the conductive pad.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: January 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yun Hou, Sao-Ling Chiu, Ping-Kang Huang, Wen Hsin Wei, Wen-Chih Chiou, Shin-Puu Jeng, Bruce C. S. Chou
  • Patent number: 10513006
    Abstract: A chemical-mechanical polishing system has a first polishing apparatus configured to perform a first chemical-mechanical polish on a workpiece and a second polishing apparatus configured to perform a second chemical-mechanical polish on the workpiece. A rework polishing apparatus comprising a rework platen and a rework CMP head is configured to perform an auxiliary chemical-mechanical polish on the workpiece when the workpiece is positioned on the rework platen. A measurement apparatus measures one or more parameters of the workpiece, and a transport apparatus transports the workpiece between the first polishing apparatus, second polishing apparatus, rework polishing apparatus, and measurement apparatus. A controller determines a selective transport of the workpiece to the rework polishing apparatus by the transport apparatus only when the one or more parameters are unsatisfactory.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jiann Lih Wu, Jason Shen, Soon-Kang Huang, James Jeng-Jyi Hwang, Chi-Ming Yang
  • Publication number: 20190337116
    Abstract: A method of using a polishing system includes securing a wafer to a support, wherein the wafer has a first diameter. The method further includes polishing the wafer using a first polishing pad rotating about a first axis, wherein the first polishing pad has a second diameter greater than the first diameter. The method further includes rotating the support about a second axis perpendicular to the first axis after polishing the wafer using the first polishing pad. The method further includes polishing the wafer using a second polishing pad after rotating the support, wherein the second polishing pad has a third diameter less than the first diameter. The method further includes releasing the wafer from the support following polishing the wafer using the second polishing pad.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Shih-Chi LIN, Kun-Tai WU, You-Hua CHOU, Chih-Tsung LEE, Min Hao HONG, Chih-Jen WU, Chen-Ming HUANG, Soon-Kang HUANG, Chin-Hsiang CHANG, Chih-Yuan YANG
  • Patent number: 10366540
    Abstract: An electronic apparatus includes a displayer, a graphic processing circuit, sensors and a control circuit. The displayer is configured for displaying a virtual reality scene or an augmented reality scene. The graphic processing circuit is coupled to the displayer. The graphic processing circuit is configured for computing a plurality of scene segments in the virtual reality scene or the augmented reality scene. The sensors are configured for collecting attention factors. The control circuit is coupled to the sensors and the graphic processing circuit. The control circuit is adapted to generate an attention map according to the attention factors. The attention map indicates priority rankings of the scene segments. The control circuit is further adapted to allocate a distribution of computational resources of the graphic processing circuit between the scene segments according to the priority rankings. The scene segments are computed differentially according to the distribution of computational resources.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: July 30, 2019
    Assignee: HTC Corporation
    Inventors: Edward Chang, Liang-Kang Huang, Chih-Yang Chen
  • Patent number: 10357867
    Abstract: A polishing system includes a wafer support that holds a wafer, the wafer having a first diameter. The polishing system further includes a first polishing pad that polishes a first region of the wafer, the first polishing pad having a second diameter greater than the first diameter. The polishing system further includes an auxiliary polishing system comprising at least one second polishing pad that polishes a second region of the wafer, wherein the second polishing pad has a third diameter less than the first diameter, and the wafer support is configured to support the wafer during use of the first polishing pad and the auxiliary polishing system.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: July 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Min Hao Hong, Chih-Jen Wu, Chen-Ming Huang, Soon-Kang Huang, Chin-Hsiang Chang, Chih-Yuan Yang
  • Patent number: 10348839
    Abstract: A device management method for use in a cloud system including a remote device, a mobile device and a cloud server is provided. The method includes the steps of: using, by the mobile device and the remote device, a same login information to log in the cloud server; sending, by the remote device, a push notification message to the mobile device through the cloud server when detecting that a first device is connected to a connection port, wherein the push notification message includes first identification information corresponding to the first device; and in response to receiving the push notification message, identifying, by the mobile device, the first device according to the first identification information to activate a respective application so as to perform data transmission with the first device through the respective application.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: July 9, 2019
    Assignee: ACER INCORPORATED
    Inventors: Cheng-Hung Chen, Chao-Kuang Yang, Wen-Cheng Hsu, Shih-Hao Lin, Chia-Hsun Lee, Chi-Hung Chang, Tzu-Kang Huang, Chen-Hsiang Ko, Chi-Sheng Lin
  • Patent number: 10234639
    Abstract: A pressing cleaner for an optical connector's end face includes a housing, a support unit fixed inside the housing, a feeding unit which is opposite to the support unit and held and moved in the housing; the feeding unit is pivotally fitted at a rotary unit ahead, the rotary unit is provided with a cleaning head at the front side, the cleaning head is equipped with a pressing surface ahead, and the feeding unit allows a cleaning wire to be stretched and wound around the cleaning head as well as the pressing surface externally; the rotary unit includes a worm shaft on which guiding slots are opened wherein the guiding slots correspond to pins in the front of the support unit for holding the pins inside the guiding slots; an optical connector's end face is cleaned by the cleaning wire when the pressing surface is activated and the rotary unit is driven via the pins and the guiding slots for rotations.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: March 19, 2019
    Assignee: HOBBES & CO., LTD.
    Inventors: Yen-Chang Huang, Tse-Kang Huang
  • Patent number: 10152827
    Abstract: A method to provide a 3D outfit model able to be adjusted corresponding to a 3D human model. The method includes following steps. A three-dimensional (3D) human model is provided, and vertices of the 3D human model are located at first positions. A 3D outfit model is provided, and vertices of the 3D outfit model are located at second positions. In response to that the 3D human model is deformed and the vertices of the 3D human model are displaced from the first positions to third positions, the 3D outfit model is adjusted corresponding to the 3D human model, by setting each of the vertices of the 3D outfit model to fourth positions according to the second positions and displacements of the vertices of the 3D human model between the first positions and the third positions.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: December 11, 2018
    Assignee: HTC Corporation
    Inventors: Sheng-Jie Luo, Liang-Kang Huang, Yu-Ting Wu, Tung-Peng Wu
  • Patent number: 10148929
    Abstract: An electronic apparatus includes a motion sensor, an image capturing unit, a display unit and a processing unit. A controlling method for the electronic apparatus includes following steps. An initial orientation of the electronic apparatus is obtained by the motion sensor when a first image is captured by the electronic apparatus. A predetermined rotation angle relative to the initial orientation is assigned. A rotation prompt indicating the predetermined rotation angle is displayed via the display unit.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: December 4, 2018
    Assignee: HTC Corporation
    Inventors: Liang-Kang Huang, Yu-Ting Lee, Tzu-Hao Kuo, Chun-Hsiang Huang
  • Publication number: 20180332699
    Abstract: A printed circuit board has a copper clad laminate and a plurality of holes. The copper clad laminate for dissipating heats generated from a chip when the chip operates has a plurality of solder paste disposed areas. The plurality of holes situate on the copper clad laminate and each of the holes does not communicate with others, wherein the plurality of holes are nonconductors. Each of the solder paste disposed areas is surrounded by the plurality of holes and each solder paste disposed areas is surrounded by at least two holes.
    Type: Application
    Filed: July 17, 2018
    Publication date: November 15, 2018
    Applicant: UNLIMITER MFA CO., LTD.
    Inventors: KUO-PING YANG, NEO BOB CHIH YUNG YANG, LIN-HE CHU, WEN-CHIANG WU, SHIH-KANG HUANG, YI-YEN CHIANG
  • Patent number: 10096482
    Abstract: An apparatus and method for providing target thickness and surface profile uniformity control of a multi-head chemical mechanical polishing (CMP) process is disclosed. An exemplary method includes providing at least two wafers; determining a surface profile of each of the at least two wafers; determining an operation mode for a chemical mechanical polishing (CMP) process based on the surface profiles of the at least two wafers; determining a CMP polishing recipe for each of the at least two wafers based on the operation mode; and performing the CMP process on the at least two wafers based on the determined CMP polishing recipes.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: October 9, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Keung Hui, Jin-Ning Sung, Jong-I Mou, Soon-Kang Huang, Yen-Di Tsen
  • Patent number: 10090207
    Abstract: A wafer polishing system including a platen configured to rotate in a first direction, and a polishing head configured to hold a wafer, the polishing head configured to rotate in a second direction. The wafer polishing system further includes an optical sensing system configured to detect a thickness of the wafer at a first location on the platen and a second location on the platen. A first distance from a center of the platen to the first location is different than a second distance from the center of the platen to the second location.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiann Lih Wu, Jeng-Jyi Hwang, Soon-Kang Huang, Chi-Ming Yang
  • Publication number: 20180276894
    Abstract: An electronic apparatus includes a displayer, a graphic processing circuit, sensors and a control circuit. The displayer is configured for displaying a virtual reality scene or an augmented reality scene. The graphic processing circuit is coupled to the displayer. The graphic processing circuit is configured for computing a plurality of scene segments in the virtual reality scene or the augmented reality scene. The sensors are configured for collecting attention factors. The control circuit is coupled to the sensors and the graphic processing circuit. The control circuit is adapted to generate an attention map according to the attention factors. The attention map indicates priority rankings of the scene segments. The control circuit is further adapted to allocate a distribution of computational resources of the graphic processing circuit between the scene segments according to the priority rankings. The scene segments are computed differentially according to the distribution of computational resources.
    Type: Application
    Filed: March 23, 2017
    Publication date: September 27, 2018
    Inventors: Edward CHANG, Liang-Kang HUANG, Chih-Yang CHEN
  • Publication number: 20180277495
    Abstract: A package structure includes an interposer, a die over and bonded to the interposer, and a Printed Circuit Board (PCB) underlying and bonded to the interposer. The interposer is free from transistors therein (add transistor), and includes a semiconductor substrate, an interconnect structure over the semiconductor substrate, through-vias in the silicon substrate, and redistribution lines on a backside of the silicon substrate. The interconnect structure and the redistribution lines are electrically coupled through the through-vias.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Sao-Ling Chiu, Kuo-Ching Hsu, Wei-Cheng Wu, Ping-Kang Huang, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu
  • Patent number: D888981
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: June 30, 2020
    Inventors: Chun-Mu Huang, Li-Kang Huang