Abstract: A semiconductor device including a gate insulating film; a gate electrode; a source region of a first conductivity; a drain region of the first conductivity type; a drift region of the first conductivity type formed between the channel region and the drain region; a first semiconductor region of a second conductivity type that encloses the source region, the drift region and the drain region, and includes the channel region; and a first shield wiring that encloses a portion of the source region in a plan view in conjunction with the gate electrode, the portion being not covered by the gate electrode, and is connected to the first semiconductor region, or that covers the portion and is connected to the first semiconductor region and the source region.

Abstract: A terminal insertion device that inserts a terminal into a connector housing, is provided with a stationary disk, a parallel joint mechanism which grasps an electric wire which is connected to the terminal at a leading end and conveys the electric wire and inserts the terminal into a cavity of the connector housing, a biaxial sensor portion capable of measuring at least a contour position of the terminal, roll angle calculation portion which calculates a roll angle with respect to a reference condition, and a roll angle compensation control portion that controls the parallel joint mechanism to compensate an inclination of the terminal.

Abstract: A semiconductor device includes: first and second n-type wells formed in p-type semiconductor substrate, the second n-type well being deeper than the first n-type well; first and second p-type backgate regions formed in the first and second n-type wells; first and second n-type source regions formed in the first and second p-type backgate regions; first and second n-type drain regions formed in the first and second n-type wells, at positions opposed to the first and second n-type source regions, sandwiching the first and the second p-type backgate regions; and field insulation films formed on the substrate, at positions between the first and second p-type backgate regions and the first and second n-type drain regions; whereby first transistor is formed in the first n-type well, and second transistor is formed in the second n-type well with a higher reverse voltage durability than the first transistor.

Abstract: A semiconductor device includes: first and second n-type wells formed in p-type semiconductor substrate, the second n-type well being deeper than the first n-type well; first and second p-type backgate regions formed in the first and second n-type wells; first and second n-type source regions formed in the first and second p-type backgate regions; first and second n-type drain regions formed in the first and second n-type wells, at positions opposed to the first and second n-type source regions, sandwiching the first and the second p-type backgate regions; and field insulation films formed on the substrate, at positions between the first and second p-type backgate regions and the first and second n-type drain regions; whereby first transistor is formed in the first n-type well, and second transistor is formed in the second n-type well with a higher reverse voltage durability than the first transistor.

Abstract: A semiconductor device including a gate insulating film; a gate electrode; a source region of a first conductivity; a drain region of the first conductivity type; a drift region of the first conductivity type formed between the channel region and the drain region; a first semiconductor region of a second conductivity type that encloses the source region, the drift region and the drain region, and includes the channel region; and a first shield wiring that encloses a portion of the source region in a plan view in conjunction with the gate electrode, the portion being not covered by the gate electrode, and is connected to the first semiconductor region, or that covers the portion and is connected to the first semiconductor region and the source region.

Abstract: Disclose is a metal connection method comprising the steps of: holding a connection part of a first metal member and a connection part of a second metal member facing each other; deforming the connection parts by applying pressure to the connection parts with the connection parts butted each other to thereby remove oxide films of the connection parts; and connecting to each other the connection part of the first metal member and the connection part of the second metal member from which the oxide films were removed by means of diffusion connection. As a result, cost is easily reduced and quality can be stably ensured.

Abstract: A conductive film having a first width in a first direction, an ONO film, and a control gate are formed above a tunnel gate insulating film. With the control gate as a mask, the conductive film is etched to form a floating gate. Then, an inter-layer insulating film is formed. A contact hole whose width in the first direction is larger than the first width is formed in the inter-layer insulating film. Then, sidewall spacer is formed on an inside wall of the contact hole.

Abstract: In the component position measurement method, the position B of the component 1 when the laser beam is blocked (the laser beam blocking position) is measured with respect to the chuck position A of the component 1. Since the component 1 generates a large vibration (inclination) during the chuck is used, the position of the leading end (front end) C of the component 1 is computed using the inclination angle ? with respect to the measurement value of the deviation amount H of the laser beam blocking position B of the component 1 based on a similarity relationship of a triangle.

Abstract: In the component position measurement method, the position B of the component 1 when the laser beam is blocked (the laser beam blocking position) is measured with respect to the chuck position A of the component 1. Since the component 1 generates a large vibration (inclination) during the chuck is used, the position of the leading end (front end) C of the component 1 is computed using the inclination angle ? with respect to the measurement value of the deviation amount H of the laser beam blocking position B of the component 1 based on a similarity relationship of a triangle.

Abstract: A conductive film having a first width in a first direction, an ONO film, and a control gate are formed above a tunnel gate insulating film. With the control gate as a mask, the conductive film is etched to form a floating gate. Then, an inter-layer insulating film is formed. A contact hole whose width in the first direction is larger than the first width is formed in the inter-layer insulating film. Then, sidewall spacer is formed on an inside wall of the contact hole.

Abstract: The disclosure pertains to a semiconductor device and its manufacture method, the semiconductor device including non-volatile memory cells and a peripheral circuit including field effect transistors having an insulated gate. A semiconductor device and its manufacture method are to be provided, the semiconductor device having memory cells with a high retention ability and field effect transistors having an insulated gate with large drive current. The semiconductor device has a semiconductor substrate (1) having first and second areas (AR1, AR2), a floating gate structure (4, 5, 6, 7, 8) for a non-volatile memory cell, a control gate structure (14) formed coupled to the floating gate structure, formed in the first area, and an insulated gate electrode (12, 14) for a logical circuit formed in the second area, wherein the floating gate structure has bird's beaks larger than those of the insulated gate electrode.

Abstract: A conductive film having a first width in a first direction, an ONO film, and a control gate are formed above a tunnel gate insulating film. With the control gate as a mask, the conductive film is etched to form a floating gate. Then, an inter-layer insulating film is formed. A contact hole whose width in the first direction is larger than the first width is formed in the inter-layer insulating film. Then, sidewall spacer is formed on an inside wall of the contact hole.

Abstract: A conductive film having a first width in a first direction, an ONO film, and a control gate are formed above a tunnel gate insulating film. With the control gate as a mask, the conductive film is etched to form a floating gate. Then, an inter-layer insulating film is formed. A contact hole whose width in the first direction is larger than the first width is formed in the inter-layer insulating film. Then, sidewall spacer is formed on an inside wall of the contact hole.

Abstract: The disclosure pertains to a semiconductor device and its manufacture method, the semiconductor device including non-volatile memory cells and a peripheral circuit including field effect transistors having an insulated gate. A semiconductor device and its manufacture method are to be provided, the semiconductor device having memory cells with a high retention ability and field effect transistors having an insulated gate with large drive current. The semiconductor device has a semiconductor substrate (1) having first and second areas (AR1, AR2), a floating gate structure (4, 5, 6, 7, 8) for a non-volatile memory cell, a control gate structure (14) formed coupled to the floating gate structure, formed in the first area, and an insulated gate electrode (12, 14) for a logical circuit formed in the second area, wherein the floating gate structure has bird's beaks larger than those of the insulated gate electrode.

Abstract: To provide a reliable terminal crimping apparatus and a terminal crimping method, which crimps an electric wire to a terminal having crimping pieces, ends of which curve in a direction of approaching each other, the terminal crimping apparatus includes a first die for placing the terminal on a surface thereof, a second die arranged correspondingly to the first die and freely approaching and parting the first die to crimp the crimp pieces by approaching the first die, and a third die arranged correspondingly to the first die and freely approaching and leaving from the first die to approach the first die before the second die crimps the crimping piece so as to push the electric wire toward the bottom plate and insert the electric wire between the pair of crimp pieces.

Abstract: To provide a reliable terminal crimping apparatus and a terminal crimping method, which crimps an electric wire to a terminal having crimping pieces, ends of which curve in a direction of approaching each other, the terminal crimping apparatus includes a first die for placing the terminal on a surface thereof, a second die arranged correspondingly to the first die and freely approaching and parting the first die to crimp the crimp pieces by approaching the first die, and a third die arranged correspondingly to the first die and freely approaching and leaving from the first die to approach the first die before the second die crimps the crimping piece so as to push the electric wire toward the bottom plate and insert the electric wire between the pair of crimp pieces.

Abstract: A semiconductor device includes non-volatile memory cells and a peripheral circuit including field effect transistors having an insulated gate. The semiconductor device has memory cells with a high retention ability and field effect transistors having an insulated gate with large drive current. The semiconductor device has a semiconductor substrate (1) having first and second areas (AR1, AR2), a floating gate structure (4, 5, 6, 7, 8) for a non-volatile memory cell, a control gate structure (14) formed coupled to the floating gate structure, formed in the first area, and an insulated gate electrode (12, 14) for a logical circuit formed in the second area, wherein the floating gate structure has bird's beaks larger than those of the insulated gate electrode.

Abstract: In an electrophotographic photosensitive member having a support at least the surface of which is conductive, and a photoconductive layer formed thereon containing an amorphous material composed chiefly of silicon, the photoconductive layer has two or more layer regions, and protuberances in a layer region adjoining to a layer region that is closest to the free surface of the electrophotographic photosensitive member have been stopped from growing at the surface of that layer region in which the protuberances occur. The protuberances has been stopped from growing not to become so large as to appear as image defects on images. Also disclosed is a process for producing such an electrophotographic photosensitive member.

Abstract: To provide a reliable terminal crimping apparatus and a terminal crimping method, which crimps an electric wire to a terminal having crimping pieces, ends of which curve in a direction of approaching each other, the terminal crimping apparatus includes a first die for placing the terminal on a surface thereof, a second die arranged correspondingly to the first die and freely approaching and parting the first die to crimp the crimp pieces by approaching the first die, and a third die arranged correspondingly to the first die and freely approaching and leaving from the first die to approach the first die before the second die crimps the crimping piece so as to push the electric wire toward the bottom plate and insert the electric wire between the pair of crimp pieces.

Abstract: A semiconductor device has a guard ring in a multilayer interconnection structure, wherein the guard ring includes a conductive wall extending zigzag in a plane parallel with a principal surface of a substrate.