Patents by Inventor Kazunori Inoue

Kazunori Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9650546
    Abstract: Provided is a novel double-sided adhesive sheet for image display device which can be bonded to the adhesion surface in close contact without space therebetween although there is a step due to printing or the like on the adhesion surface to be bonded to the adhesive sheet. The double-sided adhesive sheet for image display device 1 of the invention is a sheet to bond any two adherends selected from a surface protective panel 2, a touch panel 3, and an image display panel, and the sheet is characterized in that at least one of the adherends (surface protective panel 2) has a stepped portion 2b on an adhesion surface 2a to adhere to the double-sided adhesive sheet 1 and the surface shape of the bonding surface 1a of the double-sided adhesive sheet 1 to be bonded to the adhesion surface 2a is shaped in accordance with the surface shape of the adhesion surface 2a.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: May 16, 2017
    Assignee: MITSUBISHI PLASTICS, INC.
    Inventors: Ryota Yamamoto, Makoto Inenaga, Kazunori Inoue, Mitsuru Kojima
  • Patent number: 9640557
    Abstract: A TFT array substrate has an organic insulating film formed of a photosensitive organic resin material. A common electrode and a lead-out wiring are formed on the organic insulating film, and a pixel electrode is formed above the common electrode with an interlayer insulating film provided between them. The pixel electrode is connected to the lead-out wiring through a contact hole formed in the interlayer insulating film. The lead-out wiring and the common electrode are connected to a drain electrode and a common wiring, respectively, through contact holes formed in the organic insulating film. A metal cap film is provided on each of the lead-out wiring and the common electrode in the contact holes formed in the organic insulating film.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: May 2, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Koji Oda, Kazunori Inoue, Nobuaki Ishiga, Osamu Miyakawa
  • Publication number: 20170069665
    Abstract: To reduce the number of photolithography processes in manufacturing an active matrix substrate. Provided is a TFT substrate which has a pixel electrode connected to a drain electrode of a TFT, a source line connected to a source electrode of the TFT, and a gate line connected to a gate electrode of the TFT. A source electrode, a drain electrode, and a source line include a conductive film of the same layer as the pixel electrode. Under the source line and the pixel electrode, there remains a semiconductor layer of the same layer as a semiconductor film which constitutes a channel part of the TFT substrate.
    Type: Application
    Filed: November 17, 2016
    Publication date: March 9, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Nobuaki ISHIGA, Kazunori INOUE, Naoki TSUMURA, Kensuke NAGAYAMA, Yasuyoshi ITO
  • Publication number: 20170052402
    Abstract: A liquid crystal display device includes an electrode configuration layer provided on a support substrate, the electrode configuration layer includes a stripe region having a plurality of electrode regions and a plurality of insulator regions arranged in an alternating manner, and the electrode regions and the insulator regions are formed by partially performing a reduction treatment or an oxidation treatment on a layer made of one material, thereby controlling conductivity. Further, the electrode regions are included in at least one of the pixel electrode and the counter electrode of the liquid crystal display device.
    Type: Application
    Filed: May 25, 2015
    Publication date: February 23, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yusuke YAMAGATA, Manabu IWAKAWA, Toshihiro YAMASHITA, Koji ODA, Kazunori INOUE
  • Patent number: 9543329
    Abstract: A thin film transistor substrate includes: a gate insulating film that covers a gate electrode and a common electrode; a transparent oxide film selectively disposed on the gate insulating film; a source electrode and a drain electrode that are spaced from each other on the transparent oxide film; and a light transmissive pixel electrode electrically connected to the drain electrode. The transparent oxide film includes a conductive region and a semiconductor region. The conductive region is disposed in a lower portion of the source electrode and the drain electrode and disposed in a portion that continues from the lower portion of the drain electrode, extends to part of an upper portion of the common electrode, and forms the pixel electrode. The semiconductor region is disposed in a portion corresponding to a lower layer in a region between the source electrode and the drain electrode.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: January 10, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Koji Oda, Naoki Tsumura
  • Publication number: 20160372501
    Abstract: A thin film transistor substrate includes: a gate insulating film that covers a gate electrode and a common electrode; a transparent oxide film selectively disposed on the gate insulating film; a source electrode and a drain electrode that are spaced from each other on the transparent oxide film; and a light transmissive pixel electrode electrically connected to the drain electrode. The transparent oxide film includes a conductive region and a semiconductor region. The conductive region is disposed in a lower portion of the source electrode and the drain electrode and disposed in a portion that continues from the lower portion of the drain electrode, extends to part of an upper portion of the common electrode, and forms the pixel electrode. The semiconductor region is disposed in a portion corresponding to a lower layer in a region between the source electrode and the drain electrode.
    Type: Application
    Filed: September 1, 2016
    Publication date: December 22, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunori INOUE, Koji ODA, Naoki TSUMURA
  • Patent number: 9508750
    Abstract: A gate wiring, a source electrode, a source-electrode connecting wiring, a pixel electrode, a gate-terminal extraction electrode, and a source-terminal extraction electrode are formed in the same layer on a planarization insulating film. The gate wiring is connected to a gate electrode through a gate-electrode-portion contact hole. The source electrode is connected to a semiconductor film through a source-electrode-portion contact hole. The source-electrode connecting wiring is connected to the semiconductor film and a source wiring through the source-electrode-portion contact hole and a source-wiring-portion contact hole, respectively. The pixel electrode is connected to the semiconductor film through a drain (pixel)-electrode-portion contact hole.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kyosuke Hiwatashi, Kazunori Inoue, Kouji Oda, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura
  • Patent number: 9461077
    Abstract: A thin film transistor includes: a semiconductor channel film; a gate insulating film on the semiconductor channel film; a gate electrode formed of a laminated film including a first conductive film and a second conductive film on the gate insulating film; an interlayer insulating film covering the semiconductor channel film, the gate insulating film, and the gate electrode; a source electrode formed of a laminated film including a third conductive film and a fourth conductive film formed on the interlayer insulating film; and a drain electrode formed of the third conductive film. A gate wiring is formed of the laminated film including the first conductive film and the second conductive film. A source wiring is formed of the laminated film including the third conductive film and the fourth conductive film. A pixel electrode is formed of the first conductive film. A counter electrode is formed of the third conductive film.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: October 4, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura
  • Publication number: 20160190184
    Abstract: A thin film transistor (TFT) located on a thin film transistor substrate includes a first insulating film formed so as to cover a gate electrode, a channel layer that is formed at a position on the first insulating film overlapping the gate electrode and formed of an oxide semiconductor, a second insulating film formed on the channel layer, and a third insulating film formed so as to cover the second insulating film. A source electrode and a drain electrode are formed on the third insulating film. Each of the source electrode and the drain electrode is connected to the channel layer through the corresponding one of contact holes penetrating the second insulating film and the third insulating film.
    Type: Application
    Filed: November 13, 2015
    Publication date: June 30, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ken IMAMURA, Kazushi YAMAYOSHI, Kazunori INOUE
  • Patent number: 9343487
    Abstract: A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: May 17, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kensuke Nagayama, Kazunori Inoue, Yasuyoshi Ito, Nobuaki Ishiga, Naoki Tsumura, Shinichi Yano
  • Publication number: 20160103226
    Abstract: Device (100) has: a low-speed interval extraction unit (120) for extracting, from GPS information, a low-speed interval extending from the location at a first time point at which the measured speed of a vehicle has fallen below a prescribed value, to the location at a second time point at which the speed has exceeded the prescribed value; a vehicle speed transition model generating unit (130) for generating a model having, as constraint condition, the length and the amount of time of the low-speed interval, for indicating temporal transition of the speed in such a way that the speed continuously increases to the second time point after having decreased from the first time point; and a stop determination unit (140) for determining that the vehicle has stopped within the low-speed interval, on the condition that an interval in which the speed is zero or less is present within the model.
    Type: Application
    Filed: April 14, 2014
    Publication date: April 14, 2016
    Inventors: Kazunori INOUE, Yukio SHIKATANI
  • Publication number: 20160005770
    Abstract: A thin film transistor substrate includes: a gate insulating film that covers a gate electrode and a common electrode; a transparent oxide film selectively disposed on the gate insulating film; a source electrode and a drain electrode that are spaced from each other on the transparent oxide film; and a light transmissive pixel electrode electrically connected to the drain electrode. The transparent oxide film includes a conductive region and a semiconductor region. The conductive region is disposed in a lower portion of the source electrode and the drain electrode and disposed in a portion that continues from the lower portion of the drain electrode, extends to part of an upper portion of the common electrode, and forms the pixel electrode. The semiconductor region is disposed in a portion corresponding to a lower layer in a region between the source electrode and the drain electrode.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 7, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazunori INOUE, Koji ODA, Naoki TSUMURA
  • Patent number: 9231553
    Abstract: A configuration that reduces a parasitic capacitance between wires is achieved at a low cost. Disclosed is an acoustic wave filter provided with a piezoelectric substrate, resonators that include a comb-shaped electrode formed on the piezoelectric substrate, a wiring portion that is connected to the comb-shaped electrode, and a dielectric layer formed to cover the comb-shaped electrode. The wiring portion is provided with a lower layer wiring portion that is disposed in the same layer as the comb-shaped electrode and an upper layer wiring portion that is disposed on the lower layer wiring portion. The upper layer wiring portion includes a region that has a wider electrode width than the electrode width of the lower layer wiring portion.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: January 5, 2016
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kazunori Inoue, Takashi Matsuda, Michio Miura
  • Publication number: 20150372019
    Abstract: A thin film transistor includes: a semiconductor channel film; a gate insulating film on the semiconductor channel film; a gate electrode formed of a laminated film including a first conductive film and a second conductive film on the gate insulating film; an interlayer insulating film covering the semiconductor channel film, the gate insulating film, and the gate electrode; a source electrode formed of a laminated film including a third conductive film and a fourth conductive film formed on the interlayer insulating film; and a drain electrode formed of the third conductive film. A gate wiring is formed of the laminated film including the first conductive film and the second conductive film. A source wiring is formed of the laminated film including the third conductive film and the fourth conductive film. A pixel electrode is formed of the first conductive film. A counter electrode is formed of the third conductive film.
    Type: Application
    Filed: August 31, 2015
    Publication date: December 24, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazunori INOUE, Nobuaki ISHIGA, Kensuke NAGAYAMA, Naoki TSUMURA
  • Publication number: 20150372027
    Abstract: A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film.
    Type: Application
    Filed: August 28, 2015
    Publication date: December 24, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kensuke NAGAYAMA, Kazunori INOUE, Yasuyoshi ITO, Nobuaki ISHIGA, Naoki TSUMURA, Shinichi YANO
  • Publication number: 20150364503
    Abstract: An oxide semiconductor film and an oxide conductive film are stacked to form a semiconductor layer. The oxide conductive film is made of a material by which the oxide conductive film is etched at a higher speed than the oxide semiconductor film for example with a PAN chemical containing phosphoric acid, nitric acid, and acetic acid. A source electrode and a drain electrode are electrically connected to the oxide semiconductor film through the oxide conductive film at least at an end portion of the source electrode and an end portion of the drain electrode facing each other. A channel region made of the oxide semiconductor film is formed between the source electrode and the drain electrode. The oxide semiconductor film has a substantially tapered shape in cross section at an end face thereof.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 17, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Naoki TSUMURA, Kensuke NAGAYAMA, Nobuaki ISHIGA, Kazunori INOUE
  • Patent number: 9209203
    Abstract: A thin film transistor includes: a semiconductor channel film; a gate insulating film on the semiconductor channel film; a gate electrode formed of a laminated film including a first conductive film and a second conductive film on the gate insulating film; an interlayer insulating film covering the semiconductor channel film, the gate insulating film, and the gate electrode; a source electrode formed of a laminated film including a third conductive film and a fourth conductive film formed on the interlayer insulating film; and a drain electrode formed of the third conductive film. A gate wiring is formed of the laminated film including the first conductive film and the second conductive film. A source wiring is formed of the laminated film including the third conductive film and the fourth conductive film. A pixel electrode is formed of the first conductive film. A counter electrode is formed of the third conductive film.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: December 8, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazunori Inoue, Nobuaki Ishiga, Kensuke Nagayama, Naoki Tsumura
  • Patent number: 9190420
    Abstract: A TFT substrate includes a TFT including a source electrode having a lower source electrode and an upper source electrode, which are electrically connected to each other, and a drain electrode having a lower drain electrode and an upper drain electrode, which are electrically connected to each other. The lower source electrode and the lower drain electrode are in contact with a lower surface of the semiconductor film, and the upper source electrode and the upper drain electrode are in contact with an upper surface of the semiconductor film.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: November 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kensuke Nagayama, Kazunori Inoue, Yasuyoshi Ito, Nobuaki Ishiga, Naoki Tsumura, Shinichi Yano
  • Publication number: 20150291852
    Abstract: Provided is a novel double-sided adhesive sheet for image display device which can be bonded to the adhesion surface in close contact without space therebetween although there is a step due to printing or the like on the adhesion surface to be bonded to the adhesive sheet. The double-sided adhesive sheet for image display device 1 of the invention is a sheet to bond any two adherends selected from a surface protective panel 2, a touch panel 3, and an image display panel, and the sheet is characterized in that at least one of the adherends (surface protective panel 2) has a stepped portion 2b on an adhesion surface 2a to adhere to the double-sided adhesive sheet 1 and the surface shape of the bonding surface 1a of the double-sided adhesive sheet 1 to be bonded to the adhesion surface 2a is shaped in accordance with the surface shape of the adhesion surface 2a.
    Type: Application
    Filed: October 10, 2013
    Publication date: October 15, 2015
    Applicant: MITSUBISHI PLASTICS, INC.
    Inventors: Ryota Yamamoto, Makoto Inenaga, Kazunori Inoue, Mitsuru Kojima
  • Patent number: 9094596
    Abstract: A camera generates a light source control signal for controlling a light source to turn the light source on and off, acquires a plurality of items of first image data and a plurality of items of second image data obtained by picking up the measured wave, and transfers the plurality of items of acquired first image data and the plurality of items of acquired second image data to an external storage and processing device as digital data with an identifying number for identifying a frame in which the image data is acquired attached every frame. The external storage and processing device determines whether each frame of the digital data is an item of the first image data or an item of the second image data on the basis of the identifying number, and subtracts the plurality of items of determined second image data from the plurality of items of determined first image data to produce difference image data.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: July 28, 2015
    Assignees: NEC CORPORATION, NIPPON AVIONICS CO., LTD.
    Inventors: Kazunori Inoue, Shuichi Ohkubo