Patents by Inventor Kazunori Komori
Kazunori Komori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11976966Abstract: Provided is a light reduction mechanism which includes a plate-type first beam splitter and a plate-type second beam splitter, in which in a case where the X axis and the Y axis are arbitrary orthogonal coordinate axes in the plane perpendicular to the optical axis of laser beam irradiation optical unit whose origin is in the optical axis, the first beam splitter is arranged with the X axis as a rotation axis and inclined at an angle ? in the range from 30° to 60° inclusive with respect to the plane perpendicular to the optical axis, and the second beam splitter is arranged with the X? axis, which is parallel to the X axis and passes through the optical axis, as a rotation axis, and inclined at an angle ?? with respect to the plane perpendicular to the optical axis.Type: GrantFiled: November 6, 2023Date of Patent: May 7, 2024Assignee: Tamron Co., Ltd.Inventor: Kazunori Komori
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Publication number: 20230278136Abstract: Adopted is a laser beam irradiation optical unit for forming a spot on an object to be machined and irradiating the object to be machined with a laser beam emitted from a laser oscillator to perform laser machining including an energy intensity distribution adjustment mechanism that adjusts an energy intensity distribution of the laser beam at the spot in an irradiation trajectory of the laser beam from the laser oscillator to the object to be machined, in which the energy intensity distribution adjustment mechanism adjusts the energy intensity distribution of the laser beam at the spot so as to be non-uniform.Type: ApplicationFiled: February 23, 2023Publication date: September 7, 2023Applicant: Tamron Co., Ltd.Inventors: Kazunori KOMORI, Takashi SAKAMOTO, Masaki TAKEMOTO
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Patent number: 10845515Abstract: A contacted multilayer diffractive optical element having reduced wavelength dependency of diffraction efficiency, the contacted multilayer diffractive optical element facilitating processing in manufacture and being suitable for an infrared optical system, and an infrared optical system and an image pickup apparatus using the diffractive optical element. In order to achieve the above object, a contacted multilayer diffractive optical element comprises a first layer consisting of a first chalcogenide glass material and a second layer consisting of a second chalcogenide glass material, the first chalcogenide glass material and the second chalcogenide glass material satisfying a predetermined conditional expression and being in contact with and stacked on each other, and a diffraction grating structure in a surface of the contact therebetween, and an infrared optical system and an image pickup apparatus comprising the contacted multilayer diffractive optical element are provided.Type: GrantFiled: October 24, 2016Date of Patent: November 24, 2020Assignee: Tamron Co., Ltd.Inventor: Kazunori Komori
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Publication number: 20180180780Abstract: A contacted multilayer diffractive optical element having reduced wavelength dependency of diffraction efficiency, the contacted multilayer diffractive optical element facilitating processing in manufacture and being suitable for an infrared optical system, and an infrared optical system and an image pickup apparatus using the diffractive optical element. In order to achieve the above object, a contacted multilayer diffractive optical element comprises a first layer consisting of a first chalcogenide glass material and a second layer consisting of a second chalcogenide glass material, the first chalcogenide glass material and the second chalcogenide glass material satisfying a predetermined conditional expression and being in contact with and stacked on each other, and a diffraction grating structure in a surface of the contact therebetween, and an infrared optical system and an image pickup apparatus comprising the contacted multilayer diffractive optical element are provided.Type: ApplicationFiled: October 24, 2016Publication date: June 28, 2018Inventor: Kazunori Komori
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Patent number: 9330925Abstract: A thin-film transistor includes a substrate, a gate electrode over the substrate, an insulating layer over the gate electrode, and a semiconductor layer over the insulating layer. The semiconductor layer includes a channel region, a source region, and a drain region. A source electrode is over the source region, and a drain electrode is over the drain region. The source electrode and the drain electrode each comprise Ni and a metal other than Ni. The channel region, the source region, and the drain region comprise at least one of a polycrystalline silicon that is formed by crystallizing an amorphous silicon layer by thermally diffusing the Ni in the source electrode and the drain electrode into the semiconductor layer and a microcrystalline silicon that is formed by crystallizing an amorphous silicon layer by thermally diffusing the Ni in the source electrode and the drain electrode into the semiconductor layer.Type: GrantFiled: April 8, 2010Date of Patent: May 3, 2016Assignee: JOLED INC.Inventors: Tohru Saitoh, Takaaki Ukeda, Kazunori Komori, Sadayoshi Hotta
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Patent number: 8436355Abstract: Disclosed is a method that includes: forming a gate electrode on a substrate, then forming an insulation layer so as to completely cover the gate electrode, thereafter forming a semiconductor layer on the insulation layer, and then forming a crystallization-inducing metal layer on the semiconductor layer; removing the part of at least the crystallization-inducing metal layer that is over a channel region of the semiconductor layer; forming source and drain electrodes at a location which is over source and drain regions respectively located at opposite sides with respect to the channel region of the semiconductor layer and is above the crystallization-inducing metal layer; and heating the crystallization-inducing metal layer so as to form a silicide layer of a crystallization-inducing metal.Type: GrantFiled: November 14, 2008Date of Patent: May 7, 2013Assignee: Panasonic CorporationInventors: Takaaki Ukeda, Tohru Saitoh, Kazunori Komori, Sadayoshi Hotta
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Publication number: 20100320467Abstract: Disclosed is a method that includes: forming a gate electrode on a substrate, then forming an insulation layer so as to completely cover the gate electrode, thereafter forming a semiconductor layer on the insulation layer, and then forming a crystallization-inducing metal layer on the semiconductor layer; removing the part of at least the crystallization-inducing metal layer that is over a channel region of the semiconductor layer; forming source and drain electrodes at a location which is over source and drain regions respectively located at opposite sides with respect to the channel region of the semiconductor layer and is above the crystallization-inducing metal layer; and heating the crystallization-inducing metal layer so as to form a silicide layer of a crystallization-inducing metal.Type: ApplicationFiled: November 14, 2008Publication date: December 23, 2010Applicant: PANASONIC CORPORATIONInventors: Takaaki Ukeda, Tohru Saitoh, Kazunori Komori, Sadayoshi Hotta
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Publication number: 20100194719Abstract: A thin-film transistor includes a substrate, a gate electrode over the substrate, an insulating layer over the gate electrode, and a semiconductor layer over the insulating layer. The semiconductor layer includes a channel region, a source region, and a drain region. A source electrode is over the source region, and a drain electrode is over the drain region. The source electrode and the drain electrode each comprise Ni and a metal other than Ni. The channel region, the source region, and the drain region comprise at least one of a polycrystalline silicon that is formed by crystallizing an amorphous silicon layer by thermally diffusing the Ni in the source electrode and the drain electrode into the semiconductor layer and a microcrystalline silicon that is formed by crystallizing an amorphous silicon layer by thermally diffusing the Ni in the source electrode and the drain electrode into the semiconductor layer.Type: ApplicationFiled: April 8, 2010Publication date: August 5, 2010Applicant: PANASONIC CORPORATIONInventors: Tohru SAITOH, Takaaki UKEDA, Kazunori KOMORI, Sadayoshi HOTTA
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Patent number: 7525531Abstract: The present invention is directed to provide, for example, a lighting device and an image display, with which higher luminance and others can be achieved.Type: GrantFiled: July 25, 2001Date of Patent: April 28, 2009Assignee: Toshiba Matsushita Display Technology Co., Ltd.Inventors: Akifumi Ogiwara, Kazunori Komori, Junko Asayama, Yasunori Kuratomi
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Patent number: 7468848Abstract: A fixing method for a resin lens in which a resin lens element is fixed to a resin lens frame, includes forming the resin lens element and the resin lens frame using amorphous polyolefin as a resin material therefor; forming an abutting surface in each of the resin lens element and the resin lens frame so as to mutually abut against each other; abutting the resin lens element and the resin lens frame mutually against each other at the abutting surfaces thereof; and laser welding the abutting surfaces to each other by irradiating a laser beam thereon.Type: GrantFiled: April 30, 2007Date of Patent: December 23, 2008Assignees: Hoya Corporation, Zeon CorporationInventors: Kunihiko Shimizu, Makoto Iikawa, Kazunori Komori, Koji Minami
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Patent number: 7382040Abstract: The present invention provides a field effect transistor that includes a semiconductor layer (15) containing an organic substance, and a first electrode (16), a second electrode (12), and a third electrode (14) that are not in contact with each other at least electrically. The first electrode (16) is arranged above the semiconductor layer (15), the second electrode (12) is arranged below the semiconductor layer (15), and the third electrode (14) is arranged beside the semiconductor layer (15). The semiconductor layer (15) is connected electrically to two electrodes selected from the first electrode (16), the second electrode (12), and the third electrode (14), and the electrically insulating layers (13,17) are interposed between the electrodes (12, 14, 16). The first electrode (16) lies over the semiconductor layer (15) so as to extend beyond the periphery of the semiconductor layer (15).Type: GrantFiled: January 12, 2005Date of Patent: June 3, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Harada, Takayuki Takeuchi, Norishige Nanai, Kazunori Komori
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Publication number: 20070258155Abstract: A fixing method for a resin lens in which a resin lens element is fixed to a resin lens frame, includes forming the resin lens element and the resin lens frame using amorphous polyolefin as a resin material therefor; forming an abutting surface in each of the resin lens element and the resin lens frame so as to mutually abut against each other; abutting the resin lens element and the resin lens frame mutually against each other at the abutting surfaces thereof; and laser welding the abutting surfaces to each other by irradiating a laser beam thereon.Type: ApplicationFiled: April 30, 2007Publication date: November 8, 2007Applicants: PENTAX CORPORATION, ZEON CORPORATIONInventors: Kunihiko SHIMIZU, Makoto IIKAWA, Kazunori KOMORI, Koji MINAMI
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Patent number: 7230666Abstract: The present invention relates to a liquid crystal element wherein a liquid crystal having a liquid crystal molecule is held between two substrates. An information for aligning a liquid crystal molecule 103 in two or more directions phasedly or gradually by applying voltage is provided for two substrates 101 and 102. The information for aligning is provided for the liquid crystal molecule 103 through irregularities in a wave plate and rubbing formed on a substrate.Type: GrantFiled: September 25, 2003Date of Patent: June 12, 2007Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuhiro Nishiyama, Yukio Tanaka, Kazunori Komori, Akio Takimoto
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Publication number: 20070012922Abstract: The present invention provides a field effect transistor that includes a semiconductor layer (15) containing an organic substance, and a first electrode (16), a second electrode (12), and a third electrode (14) that are not in contact with each other at least electrically. The first electrode (16) is arranged above the semiconductor layer (15), the second electrode (12) is arranged below the semiconductor layer (15), and the third electrode (14) is arranged beside the semiconductor layer (15). The semiconductor layer (15) is connected electrically to two electrodes selected from the first electrode (16), the second electrode (12), and the third electrode (14), and the electrically insulating layers (13,17) are interposed between the electrodes (12, 14, 16). The first electrode (16) lies over the semiconductor layer (15) so as to extend beyond the periphery of the semiconductor layer (15).Type: ApplicationFiled: January 12, 2005Publication date: January 18, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Kenji Harada, Takayuki Takeuchi, Norishige Nanai, Kazunori Komori
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Patent number: 7133019Abstract: The invention provides an image display apparatus (1) comprising a lighting system (100); a LCD element (304); and an actuating means for varying the transmittance of the LCD element (304) according to image signals, wherein the LCD element (304) is designed such that when the angle of view with respect to a specified direction of a screen varies provided that the entire LCD element (304) is in a white display mode, transmittance varies such that it has peak values at viewing angles other than viewing angles in the vicinity of 0 degree, and wherein the lighting system (100) is designed such that the intensities of light beams emitted in the directions of the viewing angles in the vicinity of 0 degree are higher than the intensities of light beams emitted in the directions of the viewing angles at which the transmittance has a peak value.Type: GrantFiled: April 20, 2001Date of Patent: November 7, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Akifumi Ogiwara, Yasunori Kuratomi, Junko Asayama, Kazunori Komori
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Publication number: 20060119566Abstract: Disclosed is a liquid crystal display capable of ensuring brightness necessary for achieving satisfactory display by increasing ratio of light-emitting time to one frame period. A liquid crystal display is adapted to have a period (non-video signal write period) required for writing non-video signals different from video signals onto all the pixels before a video signal write period. In the non-video signal write period, the non-video signals are written onto the respective pixels, thereby starting response of the liquid crystal before the start of the video signal write period. In the non-video signal write period, a backlight is turned off, and thereby image degradation is prevented even when the non-video signals are written onto the respective pixels.Type: ApplicationFiled: January 18, 2006Publication date: June 8, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Ichiro Sato, Katsuhiko Kumagawa, Hiroyuki Yamakita, Kazunori Komori
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Publication number: 20060114204Abstract: Disclosed is a liquid crystal display capable of ensuring brightness necessary for achieving satisfactory display by increasing ratio of light-emitting time to one frame period. A liquid crystal display is adapted to have a period (non-video signal write period) required for writing non-video signals different from video signals onto all the pixels before a video signal write period. In the non-video signal write period, the non-video signals are written onto the respective pixels, thereby starting response of the liquid crystal before the start of the video signal write period. In the non-video signal write period, a backlight is turned off, and thereby image degradation is prevented even when the non-video signals are written onto the respective pixels.Type: ApplicationFiled: January 18, 2006Publication date: June 1, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Ichiro Sato, Katsuhiko Kumagawa, Hiroyuki Yamakita, Kazunori Komori
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Patent number: 7030848Abstract: Disclosed is a liquid crystal display capable of ensuring brightness necessary for achieving satisfactory display by increasing ratio of light-emitting time to one frame period. A liquid crystal display is adapted to have a period (non-video signal write period) required for writing non-video signals different from video signals onto all the pixels before a video signal write period. In the non-video signal write period, the non-video signals are written onto the respective pixels, thereby starting response of the liquid crystal before the start of the video signal write period. In the non-video signal write period, a backlight is turned off, and thereby image degradation is prevented even when the non-video signals are written onto the respective pixels.Type: GrantFiled: March 28, 2002Date of Patent: April 18, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Ichiro Sato, Katsuhiko Kumagawa, Hiroyuki Yamakita, Kazunori Komori
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Patent number: 6963335Abstract: An active matrix type display apparatus is provided that is inexpensive, has less crosstalk, has no flickering and a brightness gradient, and is suitable for a large screen size. The display apparatus includes a plurality of pixel electrodes arranged in a matrix, switching elements (TFTs) connected thereto, scanning electrodes, video signal electrodes, common electrodes, and a counter electrode, wherein liquid crystal, for example, is interposed between the pixel electrodes and the counter electrode. Assuming that a gate-drain capacitance is Cgd, a common electrode-pixel electrode capacitance is Cst, and the total capacitance connected to the pixel electrodes is Ctot in this configuration, ?gd and ?st represented by ?gd=Cgd/Ctot, ?st=Cst/Ctot are set to be different values between a portion close to feeding ends in a screen and a portion away therefrom.Type: GrantFiled: June 11, 2001Date of Patent: November 8, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yukio Tanaka, Katsuhiko Kumagawa, Masanori Kimura, Kazunori Komori
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Patent number: RE41237Abstract: An active matrix type display apparatus is provided that is inexpensive, has less crosstalk, has no flickering and a brightness gradient, and is suitable for a large screen size. The display apparatus includes a plurality of pixel electrodes arranged in a matrix, switching elements (TFTs) connected thereto, scanning electrodes, video signal electrodes, common electrodes, and a counter electrode, wherein liquid crystal, for example, is interposed between the pixel electrodes and the counter electrode. Assuming that a gate-drain capacitance is Cgd, a common electrode-pixel electrode capacitance is Cst, and the total capacitance connected to the pixel electrodes is Ctot in this configuration, ?gd and ?st represented by ?gd=Cgd/Ctot, ?st=Cst/Ctot are set to be different values between a portion close to feeding ends in a screen and a portion away therefrom.Type: GrantFiled: June 11, 2001Date of Patent: April 20, 2010Assignee: Panasonic CorporationInventors: Yukio Tanaka, Katsuhiko Kumagawa, Masanori Kimura, Kazunori Komori