Patents by Inventor Kazuto Takao

Kazuto Takao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848622
    Abstract: An electronic device has a primary loop circuit that includes a main circuit causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: December 19, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Hayashi, Satoshi Yoshida, Kazuto Takao
  • Patent number: 11804781
    Abstract: Electronic circuitry includes a resonant circuit to receive a square-wave voltage based on a first DC voltage and generate a first voltage; a first transmission circuit to transmit the first voltage via a transformer including a primary inductor and a secondary inductor; a second transmission circuit to transmit the first voltage via a first capacitor and a second capacitor, the first capacitor being electrically connected to a first end of the primary inductor, the second capacitor being electrically connected to a second end of the primary inductor; a rectifier circuit to rectify the first voltage and generate a second DC voltage, the first voltage being transmitted by the first transmission circuit or the second transmission circuit; a first switch circuit configured to connect the first transmission circuit and the rectifier circuit; and a second switch circuit to connect the second transmission circuit and the rectifier circuit.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: October 31, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiro Koyama, Yusuke Hayashi, Kazuto Takao
  • Patent number: 11658653
    Abstract: A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during which a switching device is turned on and during which the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit, a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit, and a setting unit that sets a gate resistance calculated by the calculator in the switching device.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: May 23, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuto Takao, Yusuke Hayashi
  • Publication number: 20230080361
    Abstract: Electronic circuitry includes a resonant circuit to receive a square-wave voltage based on a first DC voltage and generate a first voltage; a first transmission circuit to transmit the first voltage via a transformer including a primary inductor and a secondary inductor; a second transmission circuit to transmit the first voltage via a first capacitor and a second capacitor, the first capacitor being electrically connected to a first end of the primary inductor, the second capacitor being electrically connected to a second end of the primary inductor; a rectifier circuit to rectify the first voltage and generate a second DC voltage, the first voltage being transmitted by the first transmission circuit or the second transmission circuit; a first switch circuit configured to connect the first transmission circuit and the rectifier circuit; and a second switch circuit to connect the second transmission circuit and the rectifier circuit.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 16, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masahiro KOYAMA, Yusuke HAYASHI, Kazuto TAKAO
  • Patent number: 11527965
    Abstract: A power conversion circuit has an inverter circuit including a first node and a second node that output a voltage according to an input voltage, a resonant circuit connected to the first node and the second node and including a third node and a fourth node that output a resonant voltage; and an output circuit connected to the third node and the fourth node and configured to output a DC voltage, wherein the resonant circuit includes a first inductor having one end connected to the third node, a first capacitor connected between the first node and another end of the first inductor, a second capacitor connectable between the second node and the fourth node, a second inductor connectable between the third node and the fourth node, and a first switch that switches whether or not to connect the second inductor between the third node and the fourth node.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: December 13, 2022
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Hayashi, Masahiro Koyama, Kazuto Takao
  • Patent number: 11451161
    Abstract: A power switcher includes a first normally-off transistor that switches between interrupting and not interrupting a current path between first and second electrodes according to a drive voltage input to a first control electrode, a second normally-on transistor cascode-connected to the first transistor and including a second control electrode to which the second electrode of the first transistor is connected, a control voltage generator that generates a control voltage in accordance with a voltage between the first and second electrodes of the first transistor, and a drive voltage generator that generates a drive voltage equal to or lower than a withstand voltage of the first transistor in accordance with the control voltage.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: September 20, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Hayashi, Kazuto Takao, Kentaro Ikeda
  • Publication number: 20220286061
    Abstract: A power conversion circuit has an inverter circuit including a first node and a second node that output a voltage according to an input voltage, a resonant circuit connected to the first node and the second node and including a third node and a fourth node that output a resonant voltage; and an output circuit connected to the third node and the fourth node and configured to output a DC voltage, wherein the resonant circuit includes a first inductor having one end connected to the third node, a first capacitor connected between the first node and another end of the first inductor, a second capacitor connectable between the second node and the fourth node, a second inductor connectable between the third node and the fourth node, and a first switch that switches whether or not to connect the second inductor between the third node and the fourth node.
    Type: Application
    Filed: September 3, 2021
    Publication date: September 8, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke HAYASHI, Masahiro KOYAMA, Kazuto TAKAO
  • Patent number: 11355602
    Abstract: According to one embodiment, a semiconductor device includes first, second and third conductive parts, a first semiconductor region, and a first insulating part. A direction from the first conductive part toward the second conductive part is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the second partial region crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes an opposing surface facing the second conductive part. A direction from the opposing surface toward the third conductive part is along the second direction. The first insulating part includes a first insulating region. At least a portion of the first insulating region is between the opposing surface and the third conductive part.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: June 7, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki Inokuchi, Hiro Gangi, Yusuke Kobayashi, Masahiko Kuraguchi, Kazuto Takao, Ryosuke Iijima, Tatsuo Shimizu, Tatsuya Nishiwaki
  • Publication number: 20220115961
    Abstract: An electronic device has a primary loop circuit that includes a main circuit causing a current to flow in a loop shape; and a secondary loop circuit that is disposed to face the primary loop circuit at a predetermined distance, and causes an induced current generated by a magnetic field generated in the primary loop circuit to flow in a loop shape.
    Type: Application
    Filed: September 7, 2021
    Publication date: April 14, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke HAYASHI, Satoshi YOSHIDA, Kazuto TAKAO
  • Patent number: 11303214
    Abstract: A power conversion device includes a first switching element and a first inductor connected in series between a first terminal and a second terminal, the first inductor and a second switching element being connected in series between the second and third terminals, a switching controller that alternately turns on and off the first and second switching elements, a first capacitor connected between the first and second terminals, and a second capacitor connected between the second and third terminals. When a first full-wave rectified voltage is input, switching frequencies of the first switching element and the second switching element, an inductance of the first inductor, a capacitance of the first capacitor, and a capacitance of the second capacitor are set so that a second full-wave rectified voltage having a voltage amplitude and a phase same as the voltage amplitude and the phase of the first full-wave rectified voltage is output.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: April 12, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Hayashi, Kazuto Takao
  • Patent number: 11139753
    Abstract: A semiconductor device according to an embodiment includes: a first transistor having a first electrode, a second electrode, and a first control electrode, the first transistor performing a switching operation; a second transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, the second transistor performing an analog operation; and a third transistor having a fifth electrode electrically connected to the fourth electrode, a sixth electrode, and a third control electrode.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: October 5, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Ikeda, Kazuto Takao
  • Publication number: 20210257469
    Abstract: According to one embodiment, a semiconductor device includes first, second and third conductive parts, a first semiconductor region, and a first insulating part. A direction from the first conductive part toward the second conductive part is along a first direction. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the second partial region crosses the first direction. The third partial region is between the first partial region and the second conductive part in the first direction. The third partial region includes an opposing surface facing the second conductive part. A direction from the opposing surface toward the third conductive part is along the second direction. The first insulating part includes a first insulating region. At least a portion of the first insulating region is between the opposing surface and the third conductive part.
    Type: Application
    Filed: September 9, 2020
    Publication date: August 19, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki INOKUCHI, Hiro GANGI, Yusuke KOBAYASHI, Masahiko KURAGUCHI, Kazuto TAKAO, Ryosuke IIJIMA, Tatsuo SHIMIZU, Tatsuya NISHIWAKI
  • Publication number: 20210257919
    Abstract: A power conversion device includes a first switching element and a first inductor connected in series between a first terminal and a second terminal, the first inductor and a second switching element being connected in series between the second and third terminals, a switching controller that alternately turns on and off the first and second switching elements, a first capacitor connected between the first and second terminals, and a second capacitor connected between the second and third terminals. When a first full-wave rectified voltage is input, switching frequencies of the first switching element and the second switching element, an inductance of the first inductor, a capacitance of the first capacitor, and a capacitance of the second capacitor are set so that a second full-wave rectified voltage having a voltage amplitude and a phase same as the voltage amplitude and the phase of the first full-wave rectified voltage is output.
    Type: Application
    Filed: September 8, 2020
    Publication date: August 19, 2021
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke HAYASHI, Kazuto TAKAO
  • Publication number: 20210234539
    Abstract: A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device is turned on and during the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit, a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit, and a setting unit that sets a gate resistance calculated by the calculator in the switching device.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 29, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuto Takao, Yusuke Hayashi
  • Patent number: 11038500
    Abstract: A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device is turned on and during the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit, a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit, and a setting unit that sets a gate resistance calculated by the calculator in the switching device.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: June 15, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuto Takao, Yusuke Hayashi
  • Publication number: 20210126549
    Abstract: A power switcher includes a first normally-off transistor that switches between interrupting and not interrupting a current path between first and second electrodes according to a drive voltage input to a first control electrode, a second normally-on transistor cascode-connected to the first transistor and including a second control electrode to which the second electrode of the first transistor is connected, a control voltage generator that generates a control voltage in accordance with a voltage between the first and second electrodes of the first transistor, and a drive voltage generator that generates a drive voltage equal to or lower than a withstand voltage of the first transistor in accordance with the control voltage.
    Type: Application
    Filed: September 8, 2020
    Publication date: April 29, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke HAYASHI, Kazuto TAKAO, Kentaro IKEDA
  • Patent number: 10938388
    Abstract: According to one embodiment, a control circuit is connected to an element portion including a first element. The first element includes a first gate, a first collector, and a first emitter. The control circuit performs a first operation and a second operation. In at least a portion of the first operation, the control circuit causes a first current to flow from the first collector toward the first emitter. In at least a portion of the second operation, the control circuit causes a second current to flow from the first emitter toward the first collector. A first time constant of a switching of the first element in the first operation is different from a second time constant of a switching of the first element in the second operation.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: March 2, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tatsunori Sakano, Kazuto Takao
  • Publication number: 20200335968
    Abstract: A current interrupting device has a first transistor that is normally off and that switches whether to interrupt a current path, and a controller that controls a gate voltage of the first transistor such that, when no overcurrent flows through the current path, the first transistor is operated in an active region, and when an overcurrent flows through the current path, the first transistor is operated in a saturation region to limit the overcurrent, and then, the current path is interrupted.
    Type: Application
    Filed: March 13, 2020
    Publication date: October 22, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke HAYASHI, Kazuto Takao, Tatsunori Sakano, Kentaro Ikeda, Masahiro Koyama, Hongliang Su
  • Patent number: 10778216
    Abstract: According to one embodiment, a control circuit is connected to an element portion including a first element. The first element is an RC-IGBT. The first element includes a first gate, a first other gate, a first collector, and a first emitter. The control circuit performs a first operation and a second operation. In at least a portion of the first operation, the control circuit causes a first current to flow from the first collector toward the first emitter. In at least a portion of the second operation, the control circuit causes a second current to flow from the first emitter toward the first collector. In the second operation, the control circuit supplies a first pulse to the first gate and supplies a first other pulse to the first other gate. The first pulse has a first start time and a first end time.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: September 15, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsunori Sakano, Kazuto Takao
  • Publication number: 20200220533
    Abstract: A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device is turned on and during the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit, a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit, and a setting unit that sets a gate resistance calculated by the calculator in the switching device.
    Type: Application
    Filed: September 9, 2019
    Publication date: July 9, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuto Takao, Yusuke Hayashi