Abstract: An oscillation control part composed of a control switching element and a damping resistance connected in parallel is arranged between an input power supply and a main switching element of a power conversion circuit, and the control switching element and the main switching element have a relationship such as Ron(S2)<E(Rg)×fsw/(D×I2), and the main switching element is turned off and after a current of the main switching element has become zero, the control switching element is turned off to prevent a high-frequency oscillation generated between a parasitic inductance of the circuit and a junction capacitance of the main switching element, with a damping resistance.

Abstract: Disclosed is a power semiconductor module which includes a unipolar type switching device using a wide bandgap semiconductor (wide bandgap semiconductor switching device) and an insulated gate bipolar transistor using a silicon semiconductor (Si-IGBT) connected in parallel, in which a chip area of the wide bandgap semiconductor switching device is smaller than that of the Si-IGBT.

Abstract: A semiconductor rectifier device using an SiC semiconductor at least includes: an anode electrode; an anode area that adjoins the anode electrode and is made of a second conductivity type semiconductor; a drift layer that adjoins the anode area and is made of a first conductivity type semiconductor having a low concentration; a minority carrier absorption layer that adjoins the drift layer and is made of a first conductivity type semiconductor having a higher concentration than that of the drift layer; a high-resistance semiconductor area that adjoins the minority carrier absorption layer, has less thickness than the drift layer and is made of a first conductivity type semiconductor having a concentration lower than that of the minority carrier absorption layer; a cathode contact layer that adjoins the semiconductor area; and a cathode electrode.

Abstract: A gate drive circuit capable of operating at high speed and with low loss without erroneously operating the switching element is provided with a small number of components and a simple and easy circuit configuration. A primary side of a transformer is connected to an output terminal of a low-side gate drive circuit, and a secondary side of the transformer is connected to a gate input side of a high-side switching element. As a positive gate drive voltage is output from the low-side drive circuit, a negative voltage is applied between the gate and source of a high-side switching element, and a gate voltage is suppressed to be equal to or lower than a threshold value. Therefore, the high-side switching element maintains a turn-off state when the low-side switching element is turned on.

Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.

Abstract: An oscillation control part composed of a control switching element and a damping resistance connected in parallel is arranged between an input power supply and a main switching element of a power conversion circuit, and the control switching element and the main switching element have a relationship such as Ron(S2)<E(Rg)×fsw/(D×I2), and the main switching element is turned off and after a current of the main switching element has become zero, the control switching element is turned off to prevent a high-frequency oscillation generated between a parasitic inductance of the circuit and a junction capacitance of the main switching element, with a damping resistance.

Abstract: After specifications of a power converter are determined, circuit parameter values, a semiconductor device to be used, and an equivalent circuit of the semiconductor device are determined, and parameter values of the equivalent circuit are extracted. Semiconductor device loss is calculated from semiconductor device equivalent circuit parameter data, circuit parasitic parameter data, and circuit basic parameters. Determination as to whether or not the circuit loss optimal value has been achieved is made in consideration of power conversion circuit component parameter data. When the optimal value has not been achieved, the circuit parasitic parameter values are set again so as to create the circuit parasitic parameter data. When the optimal value has been achieved, the semiconductor device loss and the circuit parasitic parameter values at that time are output as design data, and the power converter is designed by use of the optimized semiconductor device loss and circuit parasitic parameter values.

Abstract: After specifications of a power converter are determined, circuit parameter values, a semiconductor device to be used, and an equivalent circuit of the semiconductor device are determined, and parameter values of the equivalent circuit are extracted. Semiconductor device loss is calculated from semiconductor device equivalent circuit parameter data, circuit parasitic parameter data, and circuit basic parameters. Determination as to whether or not the circuit loss optimal value has been achieved is made in consideration of power conversion circuit component parameter data. When the optimal value has not been achieved, the circuit parasitic parameter values are set again so as to create the circuit parasitic parameter data. When the optimal value has been achieved, the semiconductor device loss and the circuit parasitic parameter values at that time are output as design data, and the power converter is designed by use of the optimized semiconductor device loss and circuit parasitic parameter values.