Patents by Inventor Kenji Kasahara

Kenji Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8030125
    Abstract: The present invention is a method for manufacturing an organic thin-film transistor substrate including an organic thin-film transistor as a transistor element, and an object of the invention is to provide a manufacturing method capable of forming a bank in a smaller number of steps.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: October 4, 2011
    Assignee: Sumitomo Chemical Company, Limited
    Inventor: Kenji Kasahara
  • Patent number: 7998845
    Abstract: To provide a semiconductor device in which a semiconductor film having a leveled main surface is used as an active layer. A semiconductor film (5) having the leveled main surface with an rms of less than 10 nm and a P-V value of less than 70 nm which each indicate a surface roughness is formed by crystallizing a silicon film (3) containing germanium in a concentration of several %, preferably 0.1 to 10 atoms % and irradiating the film with a laser light. In a case of performing a crystallization by use of a metal element for accelerating the crystallization. The semiconductor film high in an orientation rate of the crystal as well as in levelness is obtained.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: August 16, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenji Kasahara, Shunpei Yamazaki
  • Publication number: 20110193637
    Abstract: The invention relates to an oven controlled crystal oscillator for surface mounting with reduced height (low profile). The oven controlled crystal oscillator for surface mounting comprises: a flat first substrate made of ceramic and on which are installed a crystal device and a heat resistor; and a second substrate made of a glass epoxy resin which is quadrangular in plan view and which faces the first substrate and has a larger external shape in plan view than the first substrate. The second substrate has an opening into whose center the crystal device is inserted, and has terminal sections on four locations corresponding to the surface outer periphery of the first substrate and the peripheral surfaces of the opening in the second substrate, and the terminal sections of the first substrate and second substrate are connected by solder.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 11, 2011
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Kenji Kasahara
  • Patent number: 7977750
    Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: July 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidehito Kitakado, Ritsuko Kawasaki, Kenji Kasahara
  • Publication number: 20110018007
    Abstract: Provided is a solution for narrowing of a light emitting region, increasing of leak current at an edge of a functional layer, peeling of the functional layer, or the like caused by non-uniform thickness of the functional layer at the edges thereof. Provided is an electronic device comprising a substrate; a conductive functional layer formed on the substrate; and an edge covering layer that covers edges of the functional layer, wherein the functional layer includes a functional region that is not covered by the edge covering layer. This functional layer may include a non-functional region that is made non-functional by covering the functional layer with the edge covering layer. The edge covering layer may be adhered to the substrate by an adhesion force that is greater than an adhesion force between the substrate and the functional layer.
    Type: Application
    Filed: November 13, 2008
    Publication date: January 27, 2011
    Inventors: Kenji Kasahara, Yukiya Nishioka, Tomonori Matsumuro
  • Publication number: 20100264418
    Abstract: A control substrate comprising: a substrate main body; a base layer provided on one surface perpendicular to a thickness direction of the substrate main body; and a switching element provided on the base layer's surface located on the opposite side to the substrate main body, so as to perform switching between an electric connection and an electric disconnection, wherein the switching element comprises an electrode formed on the surface of the base layer by an application method, the surface being opposite to the substrate main body, and the base layer is formed of a member whose adhesiveness to the electrode is higher than the adhesiveness of the substrate main body to an electrode when forming the electrode on a base layer side surface of the substrate main body by an application method.
    Type: Application
    Filed: December 5, 2008
    Publication date: October 21, 2010
    Applicant: Sumitomo Chemical Company, Limited
    Inventors: Yukiya Nishioka, Tomonori Matsumuro, Kenji Kasahara
  • Patent number: 7811839
    Abstract: The present invention provides a semiconductor light emitting device and a method for manufacturing the same. The semiconductor device comprises (i) a semiconductor layer with convex portions in a shape selected from a cone and a truncated cone and (ii) electrodes, wherein in the case of the convex portions with the shape of the truncated cone, the convex portions has a height of from 0.05 to 5.0 ?m and a bottom base diameter of from 0.05 to 2.0 ?m; in case of the convex portions with the shape of the cone, the convex portions has a height of from 0.05 to 5.0 ?m and a base diameter of from 0.05 to 2.0 ?m. A method for manufacturing a semiconductor light emitting device comprising the steps of (a) growing a semiconductor layer on a substrate, (b) forming on the semiconductor layer a region having particles with an average particle diameter of 0.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: October 12, 2010
    Assignee: Sumitomo Chemical Company, Ltd,
    Inventors: Kenji Kasahara, Kazumasa Ueda
  • Publication number: 20100207113
    Abstract: There is provided a thin film active element including a light-permeable substrate, a light-shielding source/drain electrode formed on the substrate, a light-permeable source/drain electrode formed on a plane surface to which the light-shielding source/drain electrode belongs, and disposed to have a gap interposed between the light-shielding source/drain electrode and the light-permeable source/drain electrode, a channel layer formed in the gap between the light-shielding source/drain electrode and the light-permeable source/drain electrode, and a gate electrode applying an electric field to the channel layer formed in the gap.
    Type: Application
    Filed: October 9, 2008
    Publication date: August 19, 2010
    Inventor: Kenji Kasahara
  • Publication number: 20100201453
    Abstract: An object of the invention is to provide an oscillator with a pedestal that facilitates soldering operations and offers a high level of productivity. A surface mount crystal oscillator with a pedestal comprises a crystal oscillator with lead wires led out from a bottom surface of a metallic base thereof; and a pedestal having a substantially rectangular outer shape in plan view, has insertion holes through which the lead wires pass, and is attached to a bottom surface of the crystal oscillator, and has mount terminals to be electrically connected to the lead wires formed on a bottom surface thereof. The configuration is such that the insertion holes are provided in four corner sections of the pedestal, in the four corner sections of the bottom surface of the pedestal where the insertion holes are formed there is provided a recess with an open outer periphery, and the lead wire is connected to a terminal electrode formed inside the recess, using solder.
    Type: Application
    Filed: January 29, 2010
    Publication date: August 12, 2010
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Kenji Kasahara
  • Publication number: 20100155754
    Abstract: The present invention provides a group III nitride semiconductor light emitting device and a method for producing the same. The group III nitride semiconductor light emitting device comprises (a1), (b1) and (c1) in this order: (a1) an N electrode, (b1) a semiconductor multi-layer film, (c1) a transparent electric conductive oxide P electrode, wherein the semiconductor multi-layer film comprises an N-type semiconductor layer, light emitting layer, P-type semiconductor layer and high concentration N-type semiconductor layer having an n-type impurity concentration of 5×1018 cm?3 to 5×1020 cm?3 in this order, the N-type semiconductor layer is in contact with the N electrode, and the semiconductor multi-layer film has a convex.
    Type: Application
    Filed: February 13, 2007
    Publication date: June 24, 2010
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Kenji Kasahara, Kazumasa Ueda, Yoshinobu Ono
  • Patent number: 7736917
    Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 15, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Kenji Kasahara, Aiko Shiga, Hidekazu Miyairi, Koichiro Tanaka, Koji Dairiki
  • Publication number: 20100127784
    Abstract: A low-price, compact oscillating device having a good temperature characteristic of a frequency intermediate between a temperature compensated crystal oscillator (TCXO) and an oven-controlled crystal oscillator (OCXO) is provided. The oscillating device having a TCXO is provided with a base on which the TCXO is mounted, that is formed into a box shape having a recess, with a plane area substantially equal to that of the TCXO; and a semiconductor chip including a temperature control circuit, a temperature sensor, and a heating element, mounted in the recess. An opening of the recess is provided in a surface opposite a surface in which the temperature compensated crystal oscillator is mounted, and sealed by a cover. A temperature of the TCXO can be kept constant to provide a oscillating device having an excellent temperature characteristic of a frequency compared with the single TCXO.
    Type: Application
    Filed: November 12, 2009
    Publication date: May 27, 2010
    Inventor: Kenji Kasahara
  • Publication number: 20100123522
    Abstract: A constant-temperature type crystal oscillator includes: a crystal unit including a case main body including a first power source terminal on an outer bottom surface thereof; a surface-mounted oscillator; a temperature control circuit including a heating resistor and a temperature sensor; and a circuit substrate including a second power source terminal. One ends of the heating resistor and the temperature sensor are electrically connected to the second power source terminal. The first power source terminal of the surface-mounted oscillator and the one ends of the heating resistor and the temperature sensor are electrically connected to the second power source terminal of the circuit substrate. The first power source terminal of the surface-mounted oscillator is directly and electrically connected to, at least, the one end of the temperature sensor via an electrically-conducting path.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 20, 2010
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Kenji KASAHARA
  • Publication number: 20100090223
    Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.
    Type: Application
    Filed: December 11, 2009
    Publication date: April 15, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hidehito KITAKADO, Ritsuko KAWASAKI, Kenji KASAHARA
  • Publication number: 20100072464
    Abstract: The present invention is a method for manufacturing an organic thin-film transistor substrate including an organic thin-film transistor as a transistor element, and an object of the invention is to provide a manufacturing method capable of forming a bank in a smaller number of steps.
    Type: Application
    Filed: March 25, 2008
    Publication date: March 25, 2010
    Applicant: SUMITOMO CHEMICAL COMPANY. LIMITED
    Inventor: Kenji Kasahara
  • Patent number: 7679131
    Abstract: A laser annealing method for obtaining a crystalline semiconductor film having a large grain size, and a method of manufacturing a semiconductor device using the crystalline semiconductor film, are provided. Using a shape change (convex portion or concave portion) of an amorphous semiconductor film when crystallizing the amorphous semiconductor film using irradiation of laser light, it is possible to intentionally regulate the origin of crystal growth, and to make the grain size large. By then designing the arrangement of an active layer (island shape semiconductor film) so as to contain at least a channel forming region within one grain, it becomes possible to improve the electrical characteristics of a TFT.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: March 16, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ritsuko Kawasaki, Kenji Kasahara, Shunpei Yamazaki
  • Patent number: 7670935
    Abstract: Island-like semiconductor films and markers are formed prior to laser irradiation. Markers are used as positional references so as not to perform laser irradiation all over the semiconductor within a substrate surface, but to perform a minimum crystallization on at least indispensable portion. Since the time required for laser crystallization can be reduced, it is possible to increase the substrate processing speed. By applying the above-described constitution to a conventional SLS method, a means for solving such problem in the conventional SLS method that the substrate processing efficiency is insufficient, is provided.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: March 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Hisashi Ohtani, Masaaki Hiroki, Koichiro Tanaka, Aiko Shiga, Mai Akiba, Kenji Kasahara
  • Patent number: 7649423
    Abstract: An oven controlled crystal oscillator capable of uniformly transmitting heat from the heat generator to improve the frequency-temperature characteristics. The oven controlled crystal oscillator includes a high thermal conductivity plate having high thermal conductivity and provided on one side of a substrate, where the crystal resonator is provided, in such a manner to contact the resistors, the transistor, the crystal resonator, and the temperature sensor. This structure can transmit heat from the resistors and the transistor as the heat generator to the crystal resonator and the temperature sensor rapidly with less heat loss to assure a uniform temperature inside the substrate, thereby improving the frequency-temperature characteristics.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: January 19, 2010
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Kenji Kasahara
  • Patent number: 7645625
    Abstract: The present invention provides a method for fine processing of a substrate, a method for fabrication of a substrate, and a light emitting device. In the method for fine processing of a substrate, after removing a single particle layer from the substrate having the single particle layer, a hole having an inner diameter smaller than a diameter of a particle and centering on a position on the substrate where each particle constructing the single particle layer has been placed is formed by etching.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshinobu Ono, Kenji Kasahara, Kazumasa Ueda
  • Patent number: 7638846
    Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted, stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: December 29, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidehito Kitakado, Ritsuko Kawasaki, Kenji Kasahara