Patents by Inventor Kenji Kasahara

Kenji Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7307282
    Abstract: The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % but not larger than 10 atomic % while adding a metal element thereto, wherein not smaller than 20% of the lattice plane {101} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, not larger than 3% of the lattice plane {001} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, and not larger than 5% of the lattice plane {111} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film as detected by the electron backscatter diffraction pattern method.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: December 11, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Mitsuki, Kenji Kasahara, Taketomi Asami, Tamae Takano, Takeshi Shichi, Chiho Kokubo, Yasuyuki Arai
  • Patent number: 7304413
    Abstract: A piezooscillator having a piezoelectric resonator, composed of: a case surrounding a space where the piezoelectric resonator is provided and including a substrate and a cover; a buffer material supporting the piezoelectric resonator and suppressing a shock conveyed from the case to the piezoelectric resonator; and a wiring member electrically connecting the piezoelectric resonator and the substrate and having flexibility, or composed of: a case surrounding a space where the piezoelectric resonator is provided and including a first substrate and a cover; a second substrate mounting the piezoelectric resonator thereon; a buffer material supporting the second substrate and suppressing a shock conveyed from the case to the piezoelectric resonator; and a wiring member electrically connecting the first and second substrates and having flexibility, in which, when the case suffers the shock from outside, the buffer material absorbs the shock to prevent the shock conveyance to the piezoelectric resonator and frequenc
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: December 4, 2007
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Kenji Kasahara
  • Patent number: 7279372
    Abstract: Island-like semiconductor films and markers are formed prior to laser irradiation. Markers are used as positional references so as not to perform laser irradiation all over the semiconductor within a substrate surface, but to perform a minimum crystallization on at least indispensable portion. Since the time required for laser crystallization can be reduced, it is possible to increase the substrate processing speed. By applying the above-described constitution to a conventional SLS method, a means for solving such problem in the conventional SLS method that the substrate processing efficiency is insufficient, is provided.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: October 9, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Hisashi Ohtani, Masaaki Hiroki, Koichiro Tanaka, Aiko Shiga, Mai Akiba, Kenji Kasahara
  • Publication number: 20070196960
    Abstract: The lip-type seal of the present invention is a lip-type seal with which the outer periphery of a rotational shaft (S) supported by a predetermined housing (H) is sealed. The lip-type seal is made up of a first annular reinforcing member (11) and a first sealing member (12). The first reinforcing member (11) includes a wall surface part (11a) defining a hole through which the rotational shaft (S) is passed and a cylindrical part (11b) bent from the outer edge of the wall surface part (11a). The first sealing member (12) includes an annular base (12a) that is joined to the housing (H), a first lip part (12b) that extends almost conically from the base (12a) inwardly in the radial direction and that comes into contact with the rotational shaft (S), and an annular concave part (12c) formed in the base (12a) so as to detachably fit the cylindrical part (11b). Accordingly, a desired sealing capability can be secured, and the components can be easily assembled, disassembled, and recycled.
    Type: Application
    Filed: April 19, 2007
    Publication date: August 23, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenji Kasahara, Shunpei Yamazaki
  • Publication number: 20070196969
    Abstract: The sizes of crystal masses are made to be a uniform in a crystalline silicon film obtained by a thermal crystallization method in which a metal element is used. An amorphous silicon film to be crystallized is doped with a metal element that accelerates crystallization, and then irradiated with laser light (with an energy which is not large enough to melt the film and which is large enough to allow the metal element to diffuse in the solid silicon film) from the back side of a light-transmissive substrate. Thereafter, heat treatment is performed to obtain a crystalline silicon film. Thus crystal masses in the crystalline silicon film can have a uniform size and the problem of fluctuation between TFTs can be solved.
    Type: Application
    Filed: April 18, 2007
    Publication date: August 23, 2007
    Inventors: Kenji Kasahara, Shinji Maekawa, Hiroshi Shibata, Hidekazu Miyairi
  • Publication number: 20070148925
    Abstract: To provide a laser apparatus and a laser annealing method with which a crystalline semiconductor film with a larger crystal grain size is obtained and which are low in their running cost. A solid state laser easy to maintenance and high in durability is used as a laser, and laser light emitted therefrom is linearized to increase the throughput and to reduce the production cost as a whole. Further, both the front side and the back side of an amorphous semiconductor film is irradiated with such laser light to obtain the crystalline semiconductor film with a larger crystal grain size.
    Type: Application
    Filed: February 16, 2007
    Publication date: June 28, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Koichiro Tanaka, Kenji Kasahara, Ritsuko Kawasaki
  • Publication number: 20070141733
    Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.
    Type: Application
    Filed: February 9, 2007
    Publication date: June 21, 2007
    Applicant: Semicondutor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Kenji Kasahara, Aiko Shiga, Hidekazu Miyairi, Koichiro Tanaka, Koji Dairiki
  • Publication number: 20070138475
    Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted, stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.
    Type: Application
    Filed: February 8, 2007
    Publication date: June 21, 2007
    Inventors: Hidehito Kitakado, Ritsuko Kawasaki, Kenji Kasahara
  • Patent number: 7211476
    Abstract: The sizes of crystal masses are made to be a uniform in a crystalline silicon film obtained by a thermal crystallization method in which a metal element is used. An amorphous silicon film to be crystallized is doped with a metal element that accelerates crystallization, and then irradiated with laser light (with an energy which is not large enough to melt the film and which is large enough to allow the metal element to diffuse in the solid silicon film) from the back side of a light-transmissive substrate. Thereafter, heat treatment is performed to obtain a crystalline silicon film. Thus crystal masses in the crystalline silicon film can have a uniform size and the problem of fluctuation between TFTs can be solved.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: May 1, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenji Kasahara, Shinji Maekawa, Hiroshi Shibata, Hidekazu Miyairi
  • Patent number: 7196400
    Abstract: An object is to enhance the orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film while using as a substrate a less-heat-resistive material such as glass thereby providing a semiconductor device using a crystalline semiconductor film with high quality equivalent to a single crystal. A first crystalline semiconductor film and a second crystalline semiconductor film are formed overlying a substrate, which integrally structure a crystalline semiconductor layer. The first and second crystalline semiconductor films are polycrystalline bodies aggregated with a plurality of crystal grains. However, the crystal grains are aligned toward a (101)-plane orientation at a ratio of 30 percent or greater, preferably 80 percent or greater.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: March 27, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Mitsuki, Kenji Kasahara
  • Publication number: 20070063199
    Abstract: A semiconductor device comprises a first insulating film provided over a substrate and heat-treated, a second insulating film provided over the first insulating film, and a semiconductor film provided over the second insulating film, the second insulating film and the semiconductor film being formed successively without exposing them to the atmosphere.
    Type: Application
    Filed: November 16, 2006
    Publication date: March 22, 2007
    Inventor: Kenji Kasahara
  • Patent number: 7179698
    Abstract: To provide a laser apparatus and a laser annealing method with which a crystalline semiconductor film with a larger crystal grain size is obtained and which are low in their running cost. A solid state laser easy to maintenance and high in durability is used as a laser, and laser light emitted therefrom is linearized to increase the throughput and to reduce the production cost as a whole. Further, both the front side and the back side of an amorphous semiconductor film is irradiated with such laser light to obtain the crystalline semiconductor film with a larger crystal grain size.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: February 20, 2007
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Koichiro Tanaka, Kenji Kasahara, Ritsuko Kawasaki
  • Publication number: 20070035214
    Abstract: A piezooscillator having a piezoelectric resonator, composed of: a case surrounding a space where the piezoelectric resonator is provided and including a substrate and a cover; a buffer material supporting the piezoelectric resonator and suppressing a shock conveyed from the case to the piezoelectric resonator; and a wiring member electrically connecting the piezoelectric resonator and the substrate and having flexibility, or composed of: a case surrounding a space where the piezoelectric resonator is provided and including a first substrate and a cover; a second substrate mounting the piezoelectric resonator thereon; a buffer material supporting the second substrate and suppressing a shock conveyed from the case to the piezoelectric resonator; and a wiring member electrically connecting the first and second substrates and having flexibility, in which, when the case suffers the shock from outside, the buffer material absorbs the shock to prevent the shock conveyance to the piezoelectric resonator and frequenc
    Type: Application
    Filed: August 8, 2006
    Publication date: February 15, 2007
    Inventor: Kenji Kasahara
  • Patent number: 7176042
    Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.
    Type: Grant
    Filed: July 6, 2004
    Date of Patent: February 13, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Kenji Kasahara, Aiko Shiga, Hidekazu Miyairi, Koichiro Tanaka, Koji Dairiki
  • Patent number: 7176068
    Abstract: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: February 13, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideto Kitakado, Ritsuko Kawasaki, Kenji Kasahara
  • Publication number: 20070032049
    Abstract: A first amorphous semiconductor film is formed on an insulating surface. A catalyst element for promoting crystallization is added thereto. Thereafter, by a first heat treatment in an inert gas, a first crystalline semiconductor film is formed. A barrier layer and a second semiconductor layer are formed on the first crystalline semiconductor film. The second semiconductor layer contains a rare gas element at a concentration of 1×1019 to 2×1022/cm3, preferably 1×1020 to 1×1021/cm3 and oxygen at a concentration of 5×1017 to 1×1021/cm3. Subsequently, by a second treatment in an inert gas, the catalyst element remaining in the first crystalline semiconductor film is moved to the second semiconductor film.
    Type: Application
    Filed: October 16, 2006
    Publication date: February 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Toru Mitsuki, Hideto Ohnuma, Tamae Takano, Kenji Kasahara, Koji Dairiki
  • Publication number: 20060290239
    Abstract: A piezooscillator having a piezoelectric vibrator and an oscillation circuit in a space surrounded by a substrate and a cover, which has a smaller size and height, and further, which can be assembled easily and suppress power consumption, is provided.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 28, 2006
    Inventors: Kenji Kasahara, Takeshi Uchida
  • Publication number: 20060273860
    Abstract: Oscillation in which unwanted vibration (B mode) is surely suppressed while stable oscillation by principal vibration (C mode) is obtained is obtained. In a Colpitts oscillator including a piezoelectric vibrator, a transistor, and a first and second divided capacitive components, by inserting a feedback circuit formed by connecting a third capacitive component and a first inductor in series between a connection midpoint between the first capacitive component and the second capacitive component and an emitter of the transistor, inserting a second inductor in parallel with the second capacitive component, and setting the parallel resonance frequency of the second capacitive component and the second inductor in the vicinity of the oscillation frequency of the oscillator, the frequency band in which the negative resistance of the circuit side seen from the piezoelectric vibrator appears is set to a narrow band containing only a desired frequency to suppress unwanted vibration of the oscillator.
    Type: Application
    Filed: June 5, 2006
    Publication date: December 7, 2006
    Inventor: Kenji Kasahara
  • Patent number: 7138657
    Abstract: A semiconductor device comprises a first insulating film provided over a substrate and heat-treated, a second insulating film provided over the first insulating film, and a semiconductor film provided over the second insulating film, the second insulating film and the semiconductor film being formed successively without exposing them to the atmosphere.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: November 21, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kenji Kasahara
  • Patent number: 7132687
    Abstract: To improve the operation characteristic and reliability of a semiconductor device by optimizing the structure of bottom gate type or inverted stagger type TFTs arranged in circuits of the semiconductor device in accordance with the function of the respective circuits. At least LDD regions that overlap with a gate electrode are formed in an N channel type TFT of a driving circuit, and LDD regions that do not overlap with the gate electrode are formed in an N channel type TFT of a pixel matrix circuit. The concentration of the two kinds of LDD regions is differently set from each other, to thereby obtain the optimal circuit operation.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: November 7, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ritsuko Kawasaki, Hidehito Kitakado, Kenji Kasahara, Shunpei Yamazaki
  • Patent number: 4949874
    Abstract: A dispensing device for dispensing at least two flowable substances includes a container with two separate coaxial compartments for containing two flowable substances, respectively. Independently operable dosing units are associated with each compartment. Each dosing unit communicates with its associated compartment through a valve flap. Each dosing unit also includes a spring-actuated plunger guided in a cylinder, with a valving mechanism for enabling a predetermined quantity of the associated flowable substance to be selectively dispensed.
    Type: Grant
    Filed: January 3, 1990
    Date of Patent: August 21, 1990
    Assignee: Henkel Kommanditgesellschaft auf Aktien
    Inventors: Juergen Fiedler, Albert Stoeffler