Abstract: Systems and methods for determining security requirements for an information resource may comprise determining a sensitivity level and a criticality level associated with the information resource. In addition, the systems and methods may include determining the security requirements for the information resource based on at least one of the sensitivity level and the criticality level. Moreover, the systems and methods may include determining a recovery time objective for the information resource and insuring that information used in determining the security requirements adheres to privacy requirements.

Abstract: A method and apparatus is provided for selecting a memory device or a group of memory devices in a memory system using dedicated bank select signals in combination with encoded chip selection signals. A memory controller transmits bank select signals over bank select signal lines and encoded chip select signals on the command and address bus which are used to select an individual memory device or group of memory devices in a bank for an operation.

Abstract: A synchronous memory device and its method of operation which can be set to operate at a plurality of supported prefetch modes. The prefetch mode may be set by programming a portion of a mode register of the memory device or by setting one or more programmable elements. For read operations, the synchronous memory device internally reads data corresponding to the largest supported prefetch size, and outputs read data corresponding to the current mode. For write operations the synchronous memory accepts write data corresponding to the selected prefetch mode and writes the received data to the array. Data words corresponding to data not received are masked from writing via a write masking circuit.

Abstract: A synchronization circuit performs bit-to-bit timing correction of respective digital signals in digital signal packets applied to a packetized memory device. Each digital signal packet includes a plurality of digital signals applied to respective latches in the packetized memory device. A clock generator circuit generates a plurality of internal clock signals responsive to the external clock signal, each internal clock signal having a corresponding phase relative to the external clock signal. A plurality of selection circuits are coupled to the clock generator circuit and each has an output coupled to a clock terminal of an associated latch. Each selection circuit applies one of the internal clock signals to clock the associated latch in response to a phase command signal. An evaluation circuit receives digital signals sequentially stored in a selected one of the latches and generates a results signal indicating whether each of the digital signals has an expected value.

Abstract: A computer operating system and arrangement by which a web site owner can control the receipt of telephone and other messages by providing menus of callers from which communication will be accepted in various manners if it is to be accepted at all. Such menus are easily altered by the web site owner in a multitude of formats and enables the one who is to receive calls to closely control from whom and in what manner he or she will accept calls from outside parties. In one embodiment of the invention the means or lists can be changed through a cell phone hook-up with the web site.

Abstract: A synchronization circuit performs bit-to-bit timing correction of respective digital signals in digital signal packets applied to a packetized memory device. Each digital signal packet includes a plurality of digital signals applied to respective latches in the packetized memory device. A clock generator circuit generates a plurality of internal clock signals responsive to the external clock signal, each internal clock signal having a corresponding phase relative to the external clock signal. A plurality of selection circuits are coupled to the clock generator circuit and each has an output coupled to a clock terminal of an associated latch. Each selection circuit applies one of the internal clock signals to clock the associated latch in response to a phase command signal. An evaluation circuit receives digital signals sequentially stored in a selected one of the latches and generates a results signal indicating whether each of the digital signals has an expected value.

Abstract: A synchronization circuit performs bit-to-bit timing correction of respective digital signals in digital signal packets applied to a packetized memory device. Each digital signal packet includes a plurality of digital signals applied to respective latches. A clock generator circuit generates a plurality of internal clock signals responsive to the external clock signal, each internal clock signal having a corresponding phase relative to the external clock signal. A plurality of selection circuits applies respective internal clock signals to respective latches in response to a phase command signal. An evaluation circuit receives digital signals sequentially stored in a selected one of the latches and generates a results signal indicating whether each of the digital signals has an expected value.

Abstract: A cycling shoe includes an external frame for supporting the upper, the frame having a forefoot portion, a heel portion and a bottom member connecting the heel and forefoot portions, having torsional flexibility, the heel portion being axially rotatable relative to the forefoot portion responsive to vertical out of plane movement of the cyclist's leg, a medial side member extending between the forefoot portion and the heel portion, a lateral side member extending between the forefoot portion and the heel portion, and having a resistance to horizontal and vertical displacements of the heel portion relative to the forefoot portion.

Abstract: The present invention relates to a system for coding data. An example implementation is disclosed whereby the coding system is a computer program especially suited to analysing text input to the computer by for example a keyboard, optical character recognition or voice recognition. The data to be coded may, for example, comprise information relating to an event, item or operation. In the preferred form of the invention, the input data is text describing a medical diagnosis and operation which would be dictated or recorded by a surgeon subsequent to an operation being performed on a patient. The coding system of the present invention analyses each word or term of the medical information in conjunction with specialised and generalised dictionaries of words and terms, along with the relationships between individual words or terms.

Abstract: A meter which measures fluid flow by passing the fluid through a receptacle and determining the mass of fluid in the receptacle. The shape of the receptacle, the fluid flow path within the receptacle and the receptacle outlet are chosen to ensure that for a selected fluid the mass of fluid in the receptacle is a linear function of fluid flow rate. The mass is determined by weighing the receptacle. Total mass flow is determined by integrating the mass measurement over time if particular application of the meter is as a milk meter.