Patents by Inventor Kohichi Nakamura

Kohichi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200014871
    Abstract: An imaging device including an operation signal generation circuit of reduced circuit scale is provided. The imaging device includes a selection circuit configured to output a pixel transfer pulse signal to be input to a gate of a transfer transistor of a pixel based on a vertical block control signal, a horizontal block control signal, and a row transfer pulse signal.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 9, 2020
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Publication number: 20190253653
    Abstract: Provided is an imaging device including: a photoelectric converter; an AD converter unit including a differential stage; and a ramp signal generator. The photoelectric converter and a first part of the differential stage are arranged in a first chip, a second part of the differential stage is arranged in a second chip that is a different chip from the first chip and stacked on the first chip, and the ramp signal generator is arranged in a different chip from the first chip.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 15, 2019
    Inventors: Kohichi Nakamura, Masahiro Kobayashi, Hideo Kobayashi
  • Publication number: 20190104270
    Abstract: A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.
    Type: Application
    Filed: September 26, 2018
    Publication date: April 4, 2019
    Inventors: Katsuhito Sakurai, Yoshiaki Takada, Takahiro Shirai, Hideo Kobayashi, Kohichi Nakamura, Daisuke Yoshida, Fumihiro Inui
  • Publication number: 20190103427
    Abstract: An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.
    Type: Application
    Filed: September 27, 2018
    Publication date: April 4, 2019
    Inventors: Kohei Matsumoto, Hirofumi Totsuka, Katsuhito Sakurai, Kohichi Nakamura
  • Patent number: 10179350
    Abstract: A cleaning device (100) according to the present invention is constituted by including in a cleaning nozzle member (21) provided inside a cleaning tank (2): a large pipe diameter part (211) that supplies a cleaning fluid (31) pressure-fed from a retention tank (3); a small pipe diameter part (212) that increases the speed of a flow rate for the cleaning fluid (31) flowing in the large pipe diameter part; a conical pipe diameter part (213) that generates a fluid that includes minute bubbles by cavitation; and a guide pipe diameter part (214) for accommodating an object (5) to be cleaned. The cleaning fluid (31) is ejected to the entirety of the object (5).
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: January 15, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shohei Fukumoto, Hiroaki Yamamoto, Kohichi Tamura, Kohichi Nakamura
  • Patent number: 10044964
    Abstract: First processing of causing a hold unit to hold a first signal from an amplification unit based on reset of the amplification unit, second processing of performing AD conversion of the held first signal and outputting a second signal obtained by superposing a signal based on charges generated in a photoelectric conversion unit of a first-row pixel on the first signal, third processing of performing an operation of performing AD conversion of the held second signal and an operation of resetting the amplification unit at least partly in parallel, and fourth processing of causing the hold unit to hold a fourth signal obtained by superposing a signal based on charges generated in the photoelectric conversion unit of a second-row pixel on a third signal from the amplification unit based on resetting of the amplification unit and is output from the amplification unit are performed.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: August 7, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kazuo Yamazaki, Kohichi Nakamura, Koichiro Iwata
  • Publication number: 20180219037
    Abstract: A solid-state imaging device includes a plurality of pixels, a reference signal supply unit configured to output a reference signal, and a comparison unit configured to output a signal depending on the reference signal and a signal from the pixel. The comparison unit includes a comparator circuit including an input terminal and an output terminal, a first switch configured to connect the input terminal and the output terminal of the comparator circuit, a clamp capacitor including a first terminal connected to the input terminal of the comparator circuit, a second switch connected to a second terminal of the clamp capacitor, and configured to select one of the signal from the pixel and the reference signal and to input the selected signal to the second terminal, and a clipping circuit arranged in an electrical path through which the reference signal is input to the comparator circuit.
    Type: Application
    Filed: March 26, 2018
    Publication date: August 2, 2018
    Inventors: Kohichi Nakamura, Masaaki Iwane
  • Patent number: 9966398
    Abstract: A solid-state imaging device includes a plurality of pixels, a reference signal supply unit configured to output a reference signal, and a comparison unit configured to output a signal depending on the reference signal and a signal from the pixel. The comparison unit includes a comparator circuit including an input terminal and an output terminal, a first switch configured to connect the input terminal and the output terminal of the comparator circuit, a clamp capacitor including a first terminal connected to the input terminal of the comparator circuit, a second switch connected to a second terminal of the clamp capacitor, and configured to select one of the signal from the pixel and the reference signal and to input the selected signal to the second terminal, and a clipping circuit arranged in an electrical path through which the reference signal is input to the comparator circuit.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: May 8, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Masaaki Iwane
  • Patent number: 9906748
    Abstract: After a signal level of a digital signal is changed in a period in which a plurality of memories is sampling the digital signal, a signal for causing the plurality of memories to hold the digital signal being sampled by the plurality of memories is supplied to the plurality of memories.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: February 27, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroaki Kameyama, Hiroki Hiyama, Kohichi Nakamura
  • Patent number: 9800815
    Abstract: An image pickup apparatus includes a plurality of pixels arranged in rows and columns, a plurality of comparators, each of the comparators including a switch for controlling an operation, a signal line which is provided commonly to the switches of the plurality of comparators and through which a control signal for controlling the switches of the plurality of comparators is supplied, a control signal generation unit, and a signal line control unit configured to control an electric potential of the signal line to be set as a fixed electric potential.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 24, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hiroki Hiyama, Hiroaki Kameyama, Kazuhiro Saito
  • Patent number: 9661249
    Abstract: An image capturing apparatus includes: plural pixels arranged in matrix, each outputting a signal from a photoelectric conversion element; and plural readout circuits each provided for a corresponding column of the pixels, signals from the pixels being input to the readout circuits. The readout circuit includes an amplifier unit configured to amplify the signal from the pixel, and have a variable gain, and a hold capacitance connected to an output terminal of the amplifier unit via a sampling switch, and having a variable capacitance value. When the variable gain of the amplifier unit is set to be a first gain, the variable capacitance value of the hold capacitance is set to be a first capacitance value. When the variable gain is set to be a second gain larger than the first gain, the variable capacitance value is set to be a second capacitance value smaller than the first capacitance value.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: May 23, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hideo Kobayashi
  • Patent number: 9635298
    Abstract: An object of the present invention is to provide a comparator which has an input voltage range larger than the case where a conventional offset cancel technique is used, while reducing an offset voltage. A comparator circuit includes: a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal; a first switch having one terminal connected to the inverting input terminal and having the other terminal connected to the output terminal; a first capacitor which has one end connected with the inverting input terminal; a first signal input terminal which is another end of the first capacitor; and a second signal input terminal which selectively inputs either one of a fixed voltage and a comparing signal into the non-inverting input terminal.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: April 25, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Hideo Kobayashi, Hiroki Hiyama, Kazuo Yamazaki
  • Patent number: 9602752
    Abstract: A solid-state imaging apparatus includes: a pixels in a matrix for generating a pixel signal; and A/D converting units, corresponding to columns of the matrix, to convert the pixel signal into a n-bit digital value. The A/D converting units includes first storage units for storing the n-bit digital value one bit by one bit, and second storage units corresponding to the first storage units, to hold the digital value transferred from the first storage unit. In each of the columns of the plurality of pixels, arranged corresponding thereto are the first storage units and the second storage units form n-pairs. Each pair including the first storage unit and the second storage unit hold the digital value of the same bit. The n-pairs are arrayed in a matrix.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: March 21, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, Kohichi Nakamura, Tetsuya Itano, Yasushi Matsuno
  • Patent number: 9602753
    Abstract: A solid-state imaging apparatus includes: a comparator comparing a signal output from pixels with a reference signal of which level changes dependent on time; a plurality of first bit storage units and a plurality of second bit storage units holding, bit by bit, a count signal of the plurality of bits from a counter, according to a write control signal based on a result of the comparing by the comparator; and a control unit arranged between the comparator and the first and second bit storage units, and adjusting a delay time of the write control signal. An order of lengths of the delay time of the count signal held by the first and second bit storage units is the same as an order of lengths of the delay time of the write control signal of the first and second bit storage units.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: March 21, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kazuhiro Saito, Hiroaki Kameyama, Kohichi Nakamura
  • Publication number: 20170048474
    Abstract: A solid-state imaging device includes a plurality of pixels, a reference signal supply unit configured to output a reference signal, and a comparison unit configured to output a signal depending on the reference signal and a signal from the pixel. The comparison unit includes a comparator circuit including an input terminal and an output terminal, a first switch configured to connect the input terminal and the output terminal of the comparator circuit, a clamp capacitor including a first terminal connected to the input terminal of the comparator circuit, a second switch connected to a second terminal of the clamp capacitor, and configured to select one of the signal from the pixel and the reference signal and to input the selected signal to the second terminal, and a clipping circuit arranged in an electrical path through which the reference signal is input to the comparator circuit.
    Type: Application
    Filed: July 22, 2016
    Publication date: February 16, 2017
    Inventors: Kohichi Nakamura, Masaaki Iwane
  • Patent number: 9560302
    Abstract: An imaging apparatus includes: a pixel configured to generate a signal through photoelectric conversion; a comparator configured to compare a signal generated by the pixel with a first reference signal that changes with time; and a control unit configured to change the rate of change of the first reference signal with respect to time according to a comparison result of the comparator.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: January 31, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kohichi Nakamura, Yasuji Ikeda
  • Patent number: 9467636
    Abstract: A photoelectric conversion device includes a plurality of pixels arranged in a plurality of columns, a plurality of comparators provided correspondingly to the respective columns, a reference signal generation unit configured to supply a reference signal to the plurality of comparators, a counter configured to generate a count signal that includes a plurality of bits in synchronization with a first clock signal, a synchronization unit configured to synchronize the plurality of bits with a second clock signal to generate a synchronized count signal and to output the generated synchronized count signal, and a plurality of memories provided correspondingly to the respective comparators, the memories each being configured to store the synchronized count signal in response to a change in an output of a corresponding one of the comparators.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: October 11, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Koichiro Iwata, Kazuhiro Saito, Takeshi Akiyama, Tetsuya Itano, Hiroki Hiyama, Takashi Muto
  • Patent number: 9438828
    Abstract: Provided is a photoelectric conversion apparatus including: a pixel array having pixels arranged in matrix; a pixel output line provided according to each column of the pixel array and transmitting a pixel signal output from a pixel of each column of the pixel array; a column signal processing unit provided according to each column of the pixel array and into which the pixel signal is input from the pixel output line, in which the column signal processing unit has a plurality of horizontal adding up or averaging units configured to add up or average the plurality of pixel signals based on the pixels of different columns of the pixel array; and a plurality of adding up or averaging modes with different numbers of columns subjected to adding up or averaging can be selected by selectively using one or a plurality of the plurality of horizontal adding up or averaging units.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: September 6, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Itano, Kohichi Nakamura, Hideo Kobayashi
  • Publication number: 20160227141
    Abstract: A solid-state image sensor includes a pixel array having pixels, an AD converter configured to generate digital signals by AD-converting analog signals output from the pixel array, a plurality of memories, and an output line. A horizontal transfer period in which the plurality of memories sequentially output digital signals to the output line includes first and second periods. In the first period, digital signals having a predetermined value are continuously output to the output line from a plurality of first memories out of the plurality of memories. In the second period, the digital signals which have been AD-converted by the AD converter are output to the output line from a plurality of second memories, separate from the plurality of first memories, out of the plurality of memories.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 4, 2016
    Inventors: Hideo Kobayashi, Tetsuya Itano, Kohichi Nakamura
  • Publication number: 20160156866
    Abstract: An image pickup apparatus includes a plurality of pixels arranged in rows and columns, a plurality of comparators, each of the comparators including a switch for controlling an operation, a signal line which is provided commonly to the switches of the plurality of comparators and through which a control signal for controlling the switches of the plurality of comparators is supplied, a control signal generation unit, and a signal line control unit configured to control an electric potential of the signal line to be set as a fixed electric potential.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Kohichi Nakamura, Tetsuya Itano, Hiroki Hiyama, Hiroaki Kameyama, Kazuhiro Saito