Abstract: There is provided with a decoding apparatus for decoding a low-density parity check code defined by a parity check matrix, includes: a first operation unit configured to carry out a row operation for each row of the parity check matrix; a calculation unit configured to calculate a reliability coefficient with respect to establishment of a parity check equation defined by said each row, respectively; a second operation unit configured to carry out a column operation for said each row; and a controller configured to iteratively execute one set which includes respective processing by the first operation unit, the calculation unit and the second operation unit and omit the processing by the first operation unit and the calculation unit for a row for which the reliability coefficient has satisfied a threshold.

Abstract: A magnetic disk apparatus includes a magnetic disk that includes a plurality of zones in which a plurality of tracks are arranged for each of circumferences of a spiral, and gaps that are arranged between the zones to have a width a predetermined number of times larger than a track width and that are regions without providing recording bits; and a reproducing element that simultaneously makes an access to the recording bits contained in the tracks, reading information stored in the recording bits, wherein the number of the tracks is one or larger and a sum of one and the predetermined number or smaller in one of the zones.

Abstract: According to one embodiment, a signal processing device comprises a first waveform equalizer, a second waveform equalizer, a first Viterbi decoder, a second Viterbi decoder. The first and the second waveform equalizers equalize a waveform of the input signal according to first and second partial response characteristics and output first and second partial response signals. The first and second Viterbi decoders decode the first and the second partial response signals by means of Viterbi decoding process. The input signal is reproduced based on an output of the first Viterbi decoder and an output of the second Viterbi decoder.

Abstract: A decoder is configured to include an acquisition-unit configured to acquire first respective likelihoods of data-bits and second respective likelihoods of parity-bits. The data-bits and the parity-bits are included in code data obtained by LDPC-encoding the data-bits with a low density parity check matrix. The decoder also includes a detecting-unit configured to detect reliabilities of the first respective likelihoods and the second respective likelihoods. The decoder also includes a forming-unit configured to form an update schedule representing an order of updating the first and second respective likelihoods in order of increasing reliability, in accordance with the reliabilities. The decoder also includes an updating-unit configured to update the first and second respective likelihoods in the order represented by the update schedule, with the low density parity check matrix. The decoder also includes a discriminating-unit configured to execute hard decision of the likelihoods updated by the updating-unit.

Abstract: An FPGA functions as an activation mode setting circuit for loading activation data stored on a PROM into a circuit setting memory and setting an activation mode when activating the CPU. The FPGA outputs an activation mode setting signal to the CPU, and the CPU is activated in the set activation mode. After the CPU is activated, it follows predetermined processing steps, and performs a control operation to load the circuit setting data stored in a storage section into the circuit setting memory. Thus, the FPGA is constructed as a circuit having a desired function, and also constructed as an activation mode setting circuit when activating the CPU.

Abstract: A storage area where compressed data is stored is divided into a plurality of divided areas having a data length of Ls. Each divided area is divided into two areas, a first area having a data length of Ld and a second area having a data length of La. A plurality of first areas are gathered starting from the upper address to the lower address, whereby a memory area for compressed image data is composed. A plurality of second areas are gathered starting from the upper address to the lower address, whereby a memory area for compressed attribute data is composed. Compressed image data is sequentially written starting from the upper address to the lower address of the memory area for compressed image data. Compressed attribute data is sequentially written starting from the upper address to the lower address of the memory area for compressed attribute data.

Abstract: A readback apparatus (a) calculates a variance value of a signal read by a head from a disc medium, (b) estimates a degree of offtracking of the head from a target track to an adjacent track, and interference power from the adjacent track using the variance value of the signal, (c) calculates a soft decision likelihood value for the signal using the degree of offtracking and the interference power, and (d) performs error correcting decoding using the soft decision likelihood value.

Abstract: A magnetic disk apparatus includes a magnetic disk that includes a plurality of zones in which a plurality of tracks are arranged for each of circumferences of a spiral, and gaps that are arranged between the zones to have a width a predetermined number of times larger than a track width and that are regions without providing recording bits; and a reproducing element that simultaneously makes an access to the recording bits contained in the tracks, reading information stored in the recording bits, wherein the number of the tracks is one or larger and a sum of one and the predetermined number or smaller in one of the zones.

Abstract: Reference images on the respective surfaces of a reference document transported on a transportation path are read out by a first image reading section and a second image reading section, respectively. As a result a first reference readout image and a second reference readout image are acquired. in accordance with the difference between the changes in the sub-scanning direction in the first reference readout image and the changes in the sub-scanning direction in the second reference readout image, the reading cycle of the first image reading section X1 and the reading cycle of the second image reading section X2 are set. This makes it possible to equalize the magnifications of the respective images on the front and back sides of the document, even if the speeds of the document at the times of passing through readout positions for the front and back sides change over time, on account of the wear of a transportation roller.

Abstract: A-decoding-apparatus includes first-equalization-unit configured to obtain an-equalized-bit-string subjected to hard-decision by equalizing the-input-signal, and to obtain reliability-value-data as soft-decision which is indicating reliability of the-hard-decision with respect to each bit of the-equalized-bit-string, second-equalization-unit configured to obtain a plurality of candidates of the-equalized-bit-string subjected to hard-decision by equalizing the-first-signal, conversion-unit configured to covert the-reliability-value-data corresponding to the-candidates of the-equalized-bit-string, decoding-unit configured to obtain a-bit-string by performing error-correction decoding by using the-converted-reliability-value-date as soft-decision on the-reliability-value-data, determination-unit configured to determine whether the-bit-string obtained by the-decoding-unit contains an-error, and control-unit configured to control the-conversion-unit and the-decoding-unit based on determination-result obtained by t

Abstract: Receiving-apparatus employed in MIMO-system includes space-filtering-unit configured to separate receive-signals to signal of first-data-sequence and signal of second-data-sequence on basis of estimation result, provisional-decoding-unit configured to LDPC-decode signal of first-data-sequence and signal of second-data-sequence with check-matrices which is modified in different-forms by fundamental-row-operation from each other, to obtain provisional-likelihood-ratio for first-data-sequence and second-data-sequence, provisional-output-unit configured to output provisional-first-data-sequence and provisional-second-data-sequence on the basis of provisional-likelihood-ratio for first-data-sequence and second-data-sequence respectively, replica-signal-generation-unit configured to generate replica-signal, on basis of provisional-first-data-sequence and provisional-second-data-sequence and estimation-result of propagation-path-estimation-unit, soft-decision-outputting-unit configured to obtain receive-likelihood-v

Abstract: In an image forming apparatus, at the time of print recording of a set of image data to a plurality of recording sheets, by the use of a recording sheet interval that is an interval between a position where print recording of a recording sheet of the plurality of recording sheets ends and a position where print recording of a succeeding recording sheet starts, an image processing portion executes image processing of another set of image data read by a scanner portion and divided by an image dividing portion, in accordance with an operation command of a control portion.

Abstract: Before data is transmitted from a plurality of antennas, a plurality of known symbol sequences are transmitted from these antennas. Each known symbol sequence contains a plurality of known symbols having different subcarrier arrangements. Known symbols transmitted from different antennas have different subcarrier arrangements.

Abstract: There is provided with a decoding apparatus for decoding a low-density parity check code defined by a parity check matrix, includes: a first operation unit configured to carry out a row operation for each row of the parity check matrix; a calculation unit configured to calculate a reliability coefficient with respect to establishment of a parity check equation defined by said each row, respectively; a second operation unit configured to carry out a column operation for said each row; and a controller configured to iteratively execute one set which includes respective processing by the first operation unit, the calculation unit and the second operation unit and omit the processing by the first operation unit and the calculation unit for a row for which the reliability coefficient has satisfied a threshold.

Abstract: A wireless transmission device which communicates with a wireless reception device is provided with a transmission-signal-generating unit configured to generate, transmission signals having transmission rates arranged in order corresponding to an input order of data items of the information sequence. The transmission device is also provided with a preamble adder which adds, to the transmission signals, respective preamble signals assigned in order of the transmission rates and used for estimation of channel responses at the wireless reception device. The transmission device is further provided with transmission units configured to transmit the transmission signals with the preamble signals added thereto.

Abstract: Before data is transmitted from a plurality of antennas, a plurality of known symbol sequences are transmitted from these antennas. Each known symbol sequence contains a plurality of known symbols having different subcarrier arrangements. Known symbols transmitted from different antennas have different subcarrier arrangements.

Abstract: A readback apparatus (a) calculates a variance value of a signal read by a head from a disc medium, (b) estimates a degree of offtracking of the head from a target track to an adjacent track, and interference power from the adjacent track using the variance value of the signal, (c) calculates a soft decision likelihood value for the signal using the degree of offtracking and the interference power, and (d) performs error correcting decoding using the soft decision likelihood value.

Abstract: A channel condition detecting unit detects a condition of a channel between a transmitting apparatus and a receiving apparatus, in accordance with a pilot signal. A reference check matrix employed for LDPC coding in the transmitting apparatus is stored in the check matrix reconstructing unit. The check matrix reconstructing unit reconstructs the reference check matrix in accordance with a detection result of the channel condition detecting unit. An LDPC decoding unit obtains a probability value of each of bits in the receive data by executing the LDPC decoding operation based on a check matrix supplied from the check matrix reconstructing unit, for a likelihood value of each of the bits in an encoded bit sequence input from a detecting unit. A hard decision unit subjects a probability value of each of bits in the receive data to hard decision and obtains the receive data.

Abstract: A decoder is configured to include an acquisition-unit configured to acquire first respective likelihoods of data-bits and second respective likelihoods of parity-bits, the data-bits and the parity-bits included in code data obtained by LDPC-encoding the data-bits with a low density parity check matrix, a detecting-unit configured to detect reliabilities of the first respective likelihoods and the second respective likelihoods, a forming-unit configured to form an update schedule representing an order of updating the first and second respective likelihoods in order of increasing reliability, in accordance with the reliabilities, an updating-unit configured to update the first and second respective likelihoods in the order represented by the update schedule, with the low density parity check matrix, a discriminating-unit configured to execute hard decision of the likelihoods updated by the updating-unit, and a checking-unit configured to execute parity check of a discrimination result of the discriminating-uni

Abstract: A storage area where compressed data is stored is divided into a plurality of divided areas having a data length of Ls. Each divided area is divided into two areas, a first area having a data length of Ld and a second area having a data length of La. A plurality of first areas are gathered starting from the upper address to the lower address, whereby a memory area for compressed image data is composed. A plurality of second areas are gathered starting from the upper address to the lower address, whereby a memory area for compressed attribute data is composed. Compressed image data is sequentially written starting from the upper address to the lower address of the memory area for compressed image data. Compressed attribute data is sequentially written starting from the upper address to the lower address of the memory area for compressed attribute data.