Patents by Inventor Kohsuke Harada

Kohsuke Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070146762
    Abstract: An FPGA functions as an activation mode setting circuit for loading activation data stored on a PROM into a circuit setting memory and setting an activation mode when activating the CPU. The FPGA outputs an activation mode setting signal to the CPU, and the CPU is activated in the set activation mode. After the CPU is activated, it follows predetermined processing steps, and performs a control operation to load the circuit setting data stored in a storage section into the circuit setting memory. Thus, the FPGA is constructed as a circuit having a desired function, and also constructed as an activation mode setting circuit when activating the CPU.
    Type: Application
    Filed: December 7, 2006
    Publication date: June 28, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Makoto Higuchi, Kohsuke Harada, Tokiyuki Okano
  • Publication number: 20070133065
    Abstract: An image forming apparatus comprising an image processor which has output means for generating data for image formation based on image data and outputting the generated data for image formation and an image forming unit for forming an image based on the data for image formation generated by the image processor, wherein the image forming unit comprises storage means for storing information about an image forming speed and means for outputting the stored information, and the image processor comprises obtaining means for obtaining the information stored in the storage means and adjusting means for adjusting an output speed of the data for image formation based on the information obtained by the obtaining means.
    Type: Application
    Filed: November 28, 2006
    Publication date: June 14, 2007
    Inventors: Tokiyuki Okano, Kohsuke Harada, Makoto Higuchi
  • Patent number: 7209260
    Abstract: The object of the present invention is to use the same FIFO line memory for both enlargement and reduction during variable-magnification processing in the scan direction, allowing reduction in circuit board area, reduction in power consumption, and reduction in cost, and to provide an image processing apparatus that allows variable-magnification processing to be carried out such that the speed of a scanning unit that captures image data during variable-magnification processing in the cross-scan direction is constant. During processing to enlarge an image in the scan direction, image data travels from CCD circuit board, passing through gate b of selector, is written to and read from FIFO memory, and from gate b of selector is written to memory provided at variable magnification unit. At variable magnification unit, image data is read from memory a plurality of times in correspondence to enlargement ratio, changing the magnification of the image data.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: April 24, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Tanaka, Yoshiyuki Nakai, Toru Adachi, Keiji Nakamura, Tokiyuki Okano, Kohsuke Harada
  • Publication number: 20070033513
    Abstract: Radio-communication-system includes transmitting-station and receiving-station. The transmitting-station includes first-encoding-unit configured to generate plural parity-information by using the different-data, second-encoding-unit configured to encode each of the plural parity-information and each of the different-data to produce plural encoded-data, modulation-unit configured to modulate carriers by the plural encoded-data to generate plural modulated-signals, and multiplex-unit configured to multiplex the plural modulated-signals for outputting a multiplexed-signal.
    Type: Application
    Filed: March 28, 2006
    Publication date: February 8, 2007
    Inventors: Kohsuke Harada, Kaoru Inoue
  • Publication number: 20060222121
    Abstract: A receiving-apparatus which includes space-filtering-unit configured to separate receive-signals into signal of first-data-sequence and signal of second-data-sequence on basis of estimation result, provisional-decoding-unit configured to LDPC-decode the two corresponding signals, to obtain provisional-likelihood-ratio for the two sequences, provisional-output-unit configured to output two provisional corresponding sequences on the basis of the respective provisional-likelihood-ratio, replica-signal-generation-unit, estimation-result of propagation-path-estimation-unit, soft-decision-outputting-unit configured to obtain receive-likelihood-values of the two sequences, on basis of residual-signal obtained by subtracting replica-signal from receive-signals, actual-decoding-unit configured to LDPC-decode receive-likelihood-values, to obtain likelihood-ratio of the two sequences, and actual-output-unit configured to obtain the two sequences on the basis of likelihood-ratio of the two sequences to hard-decision.
    Type: Application
    Filed: March 22, 2006
    Publication date: October 5, 2006
    Inventors: Hironori Uchikawa, Kohsuke Harada
  • Publication number: 20060209353
    Abstract: In an image processing apparatus connected with a computer which is capable of executing image processing which corresponds to an image processing command, a file format which permits addition of the image processing command to image data which has been read is stored in a non-volatile memory. A CPU judges whether a determined file format is stored in the non-volatile memory, and when judging that the determined file format is stored in the non-volatile memory, the CPU permits addition of the image processing command to the read image data.
    Type: Application
    Filed: April 8, 2004
    Publication date: September 21, 2006
    Inventors: Kohsuke Harada, Tokiyuki Okano, Keiji Nakamura, Takashi Nishimachi, Shuhji Fujii, Yasuhiro Nakai
  • Publication number: 20060208930
    Abstract: Encoding-system includes a check-bit-generation-unit configured to generate N-ary-parity-bits by processing information composed of N-ary-symbols (where N is a power of 2) in modulo-N with a LDPC-matrix composed of binary elements, an encoded-sequence-generation-unit configured to generate an encoded sequence including the information composed of the N-ary-symbols and the N-ary-parity-bits, a modulation unit configured to modulate the encoded sequence in a modulation scheme having N-ary-modulation-symbols to produce a modulated signal, a demodulation-unit configured to demodulate the modulated signal to produce a demodulated signal, a metric-generation-unit configured to generate a metric for each of N-modulation-signal-points from the demodulated signal to obtain a plurality of metrics, and a decoding-unit configured to decode the encoded sequence by obtaining posteriori probabilities of the symbols in accordance with a state transition having an N-state defined by a binary LDPC-matrix corresponding to the L
    Type: Application
    Filed: March 15, 2006
    Publication date: September 21, 2006
    Inventor: Kohsuke Harada
  • Publication number: 20060181717
    Abstract: In an image forming apparatus, at the time of print recording of a set of image data to a plurality of recording sheets, by the use of a recording sheet interval that is an interval between a position where print recording of a recording sheet of the plurality of recording sheets ends and a position where print recording of a succeeding recording sheet starts, an image processing portion executes image processing of another set of image data read by a scanner portion and divided by an image dividing portion, in accordance with an operation command of a control portion.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 17, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kohsuke Harada, Michiyuki Suzuki
  • Publication number: 20060181747
    Abstract: Reference images on the respective surfaces of a reference document transported on a transportation path are read out by a first image reading section and a second image reading section, respectively. As a result a first reference readout image and a second reference readout image are acquired. in accordance with the difference between the changes in the sub-scanning direction in the first reference readout image and the changes in the sub-scanning direction in the second reference readout image, the reading cycle of the first image reading section X1 and the reading cycle of the second image reading section X2 are set. This makes it possible to equalize the magnifications of the respective images on the front and back sides of the document, even if the speeds of the document at the times of passing through readout positions for the front and back sides change over time, on account of the wear of a transportation roller.
    Type: Application
    Filed: February 16, 2006
    Publication date: August 17, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Sohichi Takata, Yoshitaka Okahashi, Kohsuke Harada, Takao Horiuchi, Kenji Tanaka, Kouji Yamaji
  • Publication number: 20060120401
    Abstract: An apparatus for managing information on at least one part to be used to manufacture a product includes a part-data creating unit configure to create part data that includes information on a part designated by a customer to be used to manufacture a product; a common-function-part data creating unit configured to create common-function-part data that includes at least two common-function-parts that have substantially common functions and priority information of each of the common-function-parts; an acquiring unit configured to acquire replacement-possibility data indicative of whether replacement of designated part with an alternative part is possible; an extracting unit configured to extract an alternative part for the designated part based on the common-function-part data; a determining unit configured to determine whether to replace the designated part with the alternative part based on the common-function-part data and the replacement-possibility data.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 8, 2006
    Inventors: Kohsuke Harada, Fujio Nakamura, Yuuichi Ohta
  • Publication number: 20060103889
    Abstract: An image forming one which is capable of shortening the first copy time and equalizing the image qualities of a plurality of all output copies when a plurality of copies of the original document are output using the memory copy function is provided. An image data of each one line of an original document is sequentially read by a scanner unit. Whenever the image data of a given portion of the original document less than one page thereof (for example, image data of 8 lines) is accumulated, it is subjected to irreversible compression in a compressing circuit. The irreversible compressed image data which is obtained by this irreversible compression is sequentially stored in a storage area of an image memory or HDD and thereafter is sequentially decompressed in a decompressing circuit. Image forming is sequentially conducted based upon the sequentially decompressed image data in a printing device.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Toru Adachi, Kohsuke Harada, Hiroshi Tanaka
  • Publication number: 20060023667
    Abstract: A wireless transmission device which communicates with a wireless reception device is provided with a transmission-signal-generating unit configured to generate, transmission signals having transmission rates arranged in order corresponding to an input order of data items of the information sequence. The transmission device is also provided with a preamble adder which adds, to the transmission signals, respective preamble signals assigned in order of the transmission rates and used for estimation of channel responses at the wireless reception device. The transmission device is further provided with transmission units configured to transmit the transmission signals with the preamble signals added thereto.
    Type: Application
    Filed: July 25, 2005
    Publication date: February 2, 2006
    Inventors: Yasuhiko Tanabe, Daisuke Takeda, Tsuguhide Aoki, Kohsuke Harada
  • Publication number: 20060005104
    Abstract: A channel condition detecting unit detects a condition of a channel between a transmitting apparatus and a receiving apparatus, in accordance with a pilot signal. A reference check matrix employed for LDPC coding in the transmitting apparatus is stored in the check matrix reconstructing unit. The check matrix reconstructing unit reconstructs the reference check matrix in accordance with a detection result of the channel condition detecting unit. An LDPC decoding unit obtains a probability value of each of bits in the receive data by executing the LDPC decoding operation based on a check matrix supplied from the check matrix reconstructing unit, for a likelihood value of each of the bits in an encoded bit sequence input from a detecting unit. A hard decision unit subjects a probability value of each of bits in the receive data to hard decision and obtains the receive data.
    Type: Application
    Filed: June 22, 2005
    Publication date: January 5, 2006
    Inventor: Kohsuke Harada
  • Publication number: 20050268204
    Abstract: A detecting unit detects an input signal and acquires likelihood values of respective binary data items included in the data. On the basis of reliabilities of the likelihood values of the respective binary data items acquired by the detecting unit, a scheduling unit draws up an operation schedule to execute an LDPC operation using the likelihood values of higher reliabilities with priority. On the basis of the operation schedule, an LDPC decoding unit executes decoding by executing the LDPC operation using the likelihood values acquired by the detecting unit.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 1, 2005
    Inventor: Kohsuke Harada
  • Publication number: 20050265472
    Abstract: Before data is transmitted from a plurality of antennas, a plurality of known symbol sequences are transmitted from these antennas. Each known symbol sequence contains a plurality of known symbols having different subcarrier arrangements. Known symbols transmitted from different antennas have different subcarrier arrangements.
    Type: Application
    Filed: May 24, 2005
    Publication date: December 1, 2005
    Inventors: Daisuke Takeda, Yoshimasa Egashira, Tsuguhide Aoki, Yasuhiko Tanabe, Kohsuke Harada, Hironori Uchikawa
  • Publication number: 20050216821
    Abstract: A method for mapping of coded bits using a low density parity check (LDPC) code, comprises encoding information bits by using the LDPC code to generate coded bits, sorting the coded bits in accordance with degrees of variable nodes represented by a parity check matrix of the LDPC code, dividing the sorted coded bits into a plurality of groups in accordance with a using modulation scheme, and mapping the coded bits to respective modulation signal points by considering an error resistance of each of the groups and an error resistance of a corresponding one of the modulation signal points.
    Type: Application
    Filed: March 10, 2005
    Publication date: September 29, 2005
    Inventor: Kohsuke Harada