Patents by Inventor Kun-Chih Wang

Kun-Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060186545
    Abstract: A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure which includes a bondable metal pad, a top interconnection metal layer, a stress-buffering dielectric, and at least a first via plug between the bondable metal pad and the top interconnection metal layer. The semiconductor chip also includes at least an interconnection metal layer, at least a second via plug between the interconnection metal layer and the bonding pad structure, and an active circuit situated underneath the bonding pad structure on a semiconductor substrate.
    Type: Application
    Filed: April 21, 2006
    Publication date: August 24, 2006
    Inventors: Bing-Chang Wu, Kun-Chih Wang, Mei-Ling Chao, Shiao-Shien Chen
  • Patent number: 7071575
    Abstract: A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure which includes a bondable metal pad, a top interconnection metal layer, a stress-buffering dielectric, and at least a first via plug between the bondable metal pad and the top interconnection metal layer. The semiconductor chip also includes at least an interconnection metal layer, at least a second via plug between the interconnection metal layer and the bonding pad structure, and an active circuit situated underneath the bonding pad structure on a semiconductor bottom.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: July 4, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Bing-Chang Wu, Kun-Chih Wang, Mei-Ling Chao, Shiao-Shien Chen
  • Publication number: 20060097406
    Abstract: A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure which includes a bondable metal pad, a top interconnection metal layer, a stress-buffering dielectric, and at least a first via plug between the bondable metal pad and the top interconnection metal layer. The semiconductor chip also includes at least an interconnection metal layer, at least a second via plug between the interconnection metal layer and the bonding pad structure, and an active circuit situated underneath the bonding pad structure on a semiconductor bottom.
    Type: Application
    Filed: November 10, 2004
    Publication date: May 11, 2006
    Inventors: Bing-Chang Wu, Kun-Chih Wang, Mei-Ling Chao, Shiao-Shien Chen
  • Patent number: 7026234
    Abstract: A parasitic capacitance-preventing dummy solder bump structure on a substrate has at least one conductive layer formed on the substrate, a dielectric layer employed to cover the conductive layer, an under bump metallurgy layer (UBM layer) formed on the dielectric layer, and a solder bump formed on the UBM layer.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: April 11, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Jui-Meng Jao, Shing-Ren Sheu, Kuo-Ming Chen, Hung-Min Liu, Kun-Chih Wang
  • Publication number: 20060073676
    Abstract: A pre-process before cutting a wafer is described. The wafer comprises a plurality of scribe lines and a plurality of dies defined by the scribe lines, and a material layer covers the wafer. A pre-processing step is performed to remove the material layer on the scribe lines close to the corner regions of the dies. Removing the material layer at the corner regions before cutting the wafer is able to preserve the integrity of the corner regions of the cut dies.
    Type: Application
    Filed: September 27, 2004
    Publication date: April 6, 2006
    Inventors: Kuo-Ming Chen, Kun-Chih Wang, Hermen Liu, Paul Chen, Kai-Kuang Ho
  • Publication number: 20060073232
    Abstract: An optical lens molding apparatus includes a cylindrical mold, a first mold core, a second mold core and a correctional ring. The first and the second mold core have a columnar shape and are disposed inside the cylindrical mold to form a cavity. Furthermore, the first and the second mold core have a planar portion at the end surface facing the cavity. The correctional ring is disposed on the planar portion of the second mold core. The correction ring corrects any face tilting of the molded optical lens due to the tilting of the first mold core. The present invention also provides a precision molding apparatus for forming precision parts.
    Type: Application
    Filed: January 21, 2005
    Publication date: April 6, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20060065976
    Abstract: The present invention relates to a method for manufacturing a wafer level chip scale package structure including the following steps. After providing a glass substrate and a wafer comprising a plurality of chips, the active surface of the wafer is connected to the top surface of the glass substrate. The wafer is connected with the glass substrate through either bumps or pads thereon. After drilling the glass substrate to form a plurality of through holes, a plating process is performed to form a plurality of via plugs in the through holes. Afterwards, a singulation step is performed and a plurality of chip scale package structures is obtained.
    Type: Application
    Filed: September 24, 2004
    Publication date: March 30, 2006
    Inventors: Min-Chih Hsuan, Paul Chen, Hermen Liu, Kun-Chih Wang, Kai-Kuang Ho
  • Publication number: 20060048544
    Abstract: A molding core includes: a core body having an article-shaping surface; and a hard coating formed on the article-shaping surface of the core body and including a diamond-like carbon film that includes carbon, oxygen, and at least one bonding-enhancing element which is selected from silicon, titanium, aluminum, tungsten, tantalum, chromium, zirconium, vanadium, niobium, hafnium, and boron, and which forms covalence bonding with the carbon and the oxygen.
    Type: Application
    Filed: June 13, 2005
    Publication date: March 9, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20060037363
    Abstract: A heat transfer plate for molding glass. The heat transfer plate includes a substrate having an operating surface, an intermediate layer overlying the operating surface of the substrate, and a passivation film overlying the intermediate layer.
    Type: Application
    Filed: December 1, 2004
    Publication date: February 23, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20060026995
    Abstract: A molding core includes: a core body having an article-shaping surface; and a hard coating formed on the article-shaping surface of the core body and including a diamond-like carbon film that includes carbon, nitrogen, and at least one bonding-enhancing element which is selected from silicon, titanium, aluminum, tungsten, tantalum, chromium, zirconium, vanadium, niobium, hafnium, and boron, and which forms covalence bonding with the carbon and the nitrogen.
    Type: Application
    Filed: June 13, 2005
    Publication date: February 9, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20060022195
    Abstract: The present invention provides a scribe line structure, which includes a substrate, a plurality of dielectric layers of low dielectric constant materials formed on the substrate, at least a process monitor pattern made of materials of metal formed between the dielectric layers, and a dummy metal structure connected to the process monitor pattern. The dummy metal structure includes a plurality of dummy metal layers and a plurality of dummy vias. The dummy metal structure is formed on the surface of the substrate and is exposed in the region of the scribe line, thus facilitating heat dissipation and energy release from the scribe line structure.
    Type: Application
    Filed: August 1, 2004
    Publication date: February 2, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20060010919
    Abstract: A molding core includes: a core body having an article-shaping surface; an intermediate film formed on the article-shaping surface of the core body and including a first composite layer that contains carbon, nitrogen, and at least one bonding-enhancing element which is selected from silicon, titanium, aluminum, tungsten, tantalum, chromium, zirconium, vanadium, niobium, hafnium, and boron, and which forms covalence bonding with the carbon and the nitrogen; and a hard coating that includes a carbon film formed on the intermediate film.
    Type: Application
    Filed: July 6, 2005
    Publication date: January 19, 2006
    Inventor: Kun-Chih Wang
  • Publication number: 20050202221
    Abstract: A reinforced bonding pad structure includes a bondable metal layer defined on a stress-buffering dielectric layer, and an intermediate metal layer damascened in a first inter-metal dielectric (IMD) layer disposed under the stress-buffering dielectric layer. The intermediate metal layer is situated directly under the bondable metal layer and is electrically connected to the bondable metal layer with a plurality of via plugs integrated with the bondable metal layer. A metal frame is damascened in a second IMD layer under the first IMD layer. The metal frame is situated directly under the intermediate metal layer for counteracting mechanical stress exerted on the bondable metal layer during bonding, when the thickness of said stress-buffering dielectric layer is greater than 2000 angstroms, the damascened metal frame may be omitted. An active circuit portion including active circuit components of the integrated circuit is situated directly under the metal frame.
    Type: Application
    Filed: April 22, 2005
    Publication date: September 15, 2005
    Inventors: Kun-Chih Wang, Bing-Chang Wu
  • Publication number: 20050150253
    Abstract: A method for making high precision hard film coating on a mold core comprises the following steps of: (a) providing a mold jig (200, 300) and a mold core (208, 308); (b) defining a through hole (206, 364) of a first inner diameter in the mold jig; (c) forming a rim (254, 354) of a second inner diameter on the inner side of the through hole, the second inner diameter being smaller than the first inner diameter; (d) configuring the mold core into a mold core including a body (212, 312) of a first external diameter and a top portion (250, 350) of a second external diameter, the second external diameter being smaller than the first external diameter to define a shoulder (252, 352) between the body and the top portion, the first external diameter being substantially equal to the first inner diameter and larger than the second inner diameter, the second external diameter being substantially equal to or smaller than the second inner diameter; and (e) coreing the mold core into the through hole of the mold jig from t
    Type: Application
    Filed: December 15, 2004
    Publication date: July 14, 2005
    Inventor: Kun-Chih Wang
  • Patent number: 6900541
    Abstract: An integrated circuit including a reinforced bonding pad structure is disclosed. The reinforced bonding pad structure includes a bondable metal layer defined on a stress-buffering dielectric layer, and an intermediate metal layer damascened in a first inter-metal dielectric (IMD) layer disposed under the stress-buffering dielectric layer. The intermediate metal layer is situated directly under the bondable metal layer and is electrically connected to the bondable metal layer with a plurality of via plugs integrated with the bondable metal layer. At least one metal frame is damascened in a second IMD layer under the first IMD layer. The metal frame is situated directly under the intermediate metal layer for counteracting mechanical stress exerted on the bondable metal layer during bonding. An active circuit portion including active circuit components of the integrated circuit is situated directly under the metal frame of the reinforced bonding pad structure.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: May 31, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Kun-Chih Wang, Bing-Chang Wu
  • Publication number: 20050110120
    Abstract: A wafer scribe line structure is provided. A plurality of lump patterns is set up to fill the entire scribe line area so that the amount of stress the wafer is subjected to during a dicing process is reduced, thereby reducing the probability of having a delamination at the interface of wafer layers. Moreover, the lump patterns can be formed simultaneously with metal interconnects in a metal interconnect process.
    Type: Application
    Filed: November 27, 2003
    Publication date: May 26, 2005
    Inventors: Kun-Chih Wang, Paul Chen, Jui-Meng Jao, Chien-Li Kuo
  • Publication number: 20040266160
    Abstract: A parasitic capacitance-preventing dummy solder bump structure on a substrate has at least one conductive layer formed on the substrate, a dielectric layer employed to cover the conductive layer, an under bump metallurgy layer (UBM layer) formed on the dielectric layer, and a solder bump formed on the UBM layer.
    Type: Application
    Filed: June 8, 2004
    Publication date: December 30, 2004
    Inventors: Jui-Meng Jao, Shing-Ren Sheu, Kuo-Ming Chen, Hung-Min Liu, Kun-Chih Wang
  • Patent number: 6710448
    Abstract: A bonding pad structure. The bonding pad structure includes independently built current conduction structure and mechanical support structure between a bonding pad layer and a substrate. The current conduction structure is constructed using a plurality of serially connected conductive metallic layers each at a different height between the bonding pad layer and the substrate. The conductive metallic layers connect with each other via a plurality of plugs. At least one of the conductive metallic layers connects electrically with a portion of the device in the substrate by a signal conduction line. The mechanical support structure is constructed using a plurality of serially connected supportive metallic layers each at a different height between the bonding pad layer and the substrate. The supportive metallic layers connect with each other via a plurality of plugs.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: March 23, 2004
    Assignee: United Microelectronics Corp.
    Inventor: Kun-Chih Wang
  • Patent number: 6707129
    Abstract: A structure for using fuse structure integrated wire bonding on the substrate, and relates to methods for making the same are disclosed, in which an Al-fuse has an extra-etching process pattern by fuse-open mask and has been thinned down from Al-fuse thickness. The Al fuse structure integrated Al wire-bonding pad has two kind of thickness under fuse-open and for the other area. This invention makes the fuse easy to blow without suffering any bondability from wire bonding for packaging.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: March 16, 2004
    Assignee: United Microelectronics Corp.
    Inventor: Kun-Chih Wang
  • Publication number: 20030111740
    Abstract: A structure for using fuse structure integrated wire bonding on the substrate, and relates to methods for making the same are disclosed, in which an Al-fuse has an extra-etching process pattern by fuse-open mask and has been thinned down from Al-fuse thickness. The Al fuse structure integrated Al wire-bonding pad has two kind of thickness under fuse-open and for the other area. This invention makes the fuse easy to blow without suffering any bondability from wire bonding for packaging.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Kun-Chih Wang