Abstract: In a wafer processing method and a wafer processing system, a first property on a back side of a wafer is measured. The back side of the wafer is supported on a multi-zone chuck having a plurality of zones with controllable clamping forces. The wafer is secured to the multi-zone chuck by controlling the clamping forces in the corresponding zones in accordance with measured values of the first property in the zones.

Abstract: The present disclosure provides a method and apparatus for cleaning a semiconductor wafer. In an embodiment of the method, a single wafer cleaning apparatus is provided and a wafer is positioned in the apparatus. A first chemical spray is dispensed onto a front surface of the wafer. A back surface of the wafer is cleaned while dispensing the first chemical spray. The cleaning of the back surface may include a brush and spray of cleaning fluids. An apparatus operable to clean the front surface and the back surface of a single semiconductor wafer is also described.

Abstract: The present disclosure provides a method including providing a chamber having a first inlet and a second inlet. A solution of a de-ionized (DI) water and an acid (e.g., a dilute acid) is provided to the chamber via the first inlet. A carrier gas (e.g., N2) is provided to the chamber via the second inlet. The solution and the carrier gas are in the chamber and then from the chamber onto a single semiconductor wafer. In an embodiment, the solution includes a dilute HCl and DI water.

Abstract: A method includes providing a wafer and providing a first spray bar spaced a distance from the wafer. A first spray is dispensed from the first spray bar onto a first portion (e.g., half) of the wafer. Thereafter, the wafer is rotated. A second spray is dispensed from the first spray bar onto a second portion (e.g., half) of the rotated wafer. In embodiments, a plurality of spray bars are positioned above the wafer. One or more of the spray bars may be tunable in separation distance and/or angle of dispensing.

Abstract: A method of semiconductor fabrication including providing a semiconductor wafer and dispensing a first chemical spray onto the wafer using a first nozzle and dispensing a second chemical spray using a second nozzle onto the wafer. These dispensing may be performed simultaneously. The method may further include moving the first and second nozzle. The first and second nozzle may provide the first and second chemical spray having at least one different property. For example, different chemical compositions, concentrations, temperatures, angles of dispensing, or flow rate. A chemical dispersion apparatus providing two nozzles which are operable to be separately controlled is also provided.

Abstract: This invention discloses a hair dye and a hair dyeing method using a dye mainly made of natural colors (used in food and cosmetics), synthetic colors (used in food and cosmetics), and cosmetic colors. The hair dye can be applied for dyeing hair and skin at the same time according to the keratin-like structure of the hair and skin. The hair dye can be manufactured in a form of a hair dye cream, a hair dye lotion, a frost hair dye, a hair dye gel, a hair dye ointment, a hair dye shampoo, a foam type hair dye, or a spray type hair dye. After the hair dye is combined with a perm agent, a dyeing and perming product is produced for dyeing and perming hair all at one time.

Abstract: The present invention provides a method for treating arthritic disorders, skin inflammatory disorders and pain, comprising administering to a subject an extract of Andrographis paniculata Nees, and also provides a herbal composition used therefor that comprises the extract of Andrographis paniculata Nees.

Abstract: The present invention relates to andrographolide and its derivatives of the general formula (I), as well as the stereoisomers and salts of andrographolide and the derivatives. Andrographolide and its derivatives represented by general formula (I) defined above are useful as TNF? (tumor necrosis factor alpha) antagonists or inhibitors which have inhibitory effect on the binding of TNF? to TNF-RI. Andrographolide exhibited inhibitor activity with IC50 values 60 ?M on L929 cell proliferation/cytotoxicity assay without cell cytotoxicity. In addition, in the animal model test of collagen-induced arthritis, andrographolide exhibited 50% paw edema. Andrographolide and its derivatives are promising sources with high TNF?-inhibiting or antagonizing activity.

Abstract: The use of flavone derivatives of formula (I) in which R1, R2, R3, R4 and R5 independently represent hydrogen, hydroxy or an ester group; R6 represents hydrogen, hydroxy, an ester group or an O-glycoside group such as O-rhamnose, O-glucoside, O-retinoside or O-xyloside; and represents a single bond or a double bond; or the pharmaceutically acceptable salts thereof as TNF? antagonists or inhibitors.

Abstract: A method is described for forming trench isolation for integrated circuits on silicon wafers by selectively doping the trench regions by ion implantation and then etching these areas with a wet chemical etch. A dopant such as boron, is implanted in a sequence of energies and doses to provide a desired trench profile of heavily doped silicon. The implanted silicon etches far more rapidly than the surrounding silicon and is readily etched out forming a trench. The concentration of dopant diminishes rapidly in the periphery of the implanted region. As the etch front approaches the periphery, the silicon etch rate, likewise diminishes and the etch can be quenched to leave a uniform surface layer of enhanced boron concentration which lines the resultant trench to form an effective channel stop. Wet etched trenches provide advantages over trenches formed by RIE including smooth rounded trench profiles which reduce stress. In addition, trenches having widths below 0.

Abstract: The present invention provides a method for forming a transistor having a stacked gate electrode structure with two gates; a lower floating gate and an upper control gate. The floating gate is formed of three polysilicon layers--undoped/doped/undoped polysilicon layers. A substrate is provided having a tunnel oxide layer 20. Then sequentially a first undoped, first doped, and second undoped polysilicon layers 22,24,26 are formed over the tunnel oxide layer thereby forming a lower floating gate layer 22, 24, 26. An intergate dielectric layer 28,30,32 is then formed over the second undoped polysilicon layer 26. Next, an upper control gate 36 and a cap oxide layer are formed over the intergate dielectric layer 28,30,32. The stacked two gate electrode structure is formed by patterning the above mentioned layers. Then spaced source and drain regions 44 are formed on opposite sides of the stacked gate structure thereby completing the transistor.

Abstract: A method for cleaning a semiconductor substrate. Introduced into a semiconductor substrate processing chamber is a semiconductor substrate. The semiconductor substrate and the semiconductor substrate processing chamber are maintained at a temperature not exceeding about 800 degrees centigrade. Introduced substantially simultaneously with the semiconductor substrate into the semiconductor substrate processing chamber is a low flow of a first oxidant gas. Introduced into the semiconductor substrate processing chamber immediately subsequent to the low flow of the first oxidant gas is a high flow of a second oxidant gas. Introduced into the semiconductor wafer processing chamber no earlier than the high flow of the second oxidant gas is a flow of a chlorine containing getter material.