Patents by Inventor Kyoichi Hosokawa

Kyoichi Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7808733
    Abstract: A method and apparatus for transmitting and receiving digital information including video information and audio information. The video information is compressed by a first compression method and the audio information is compressed by a different second compression method for transmission on a transmission path.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: October 5, 2010
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20100027962
    Abstract: A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
    Type: Application
    Filed: November 8, 2007
    Publication date: February 4, 2010
    Inventors: Hiroo OKAMOTO, Kyoichi Hosokawa, Hitoaki Owashi, Hiroaki Tachibana, Takaharu Noguchi
  • Publication number: 20090267587
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Application
    Filed: June 18, 2009
    Publication date: October 29, 2009
    Applicant: RENEAS TECHNOLOGY CORP.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Publication number: 20090252478
    Abstract: A method and apparatus is provided for receiving and/or reproducing a digital signal, capable of efficiently recording a compressed, packeted digital signal and inhibiting a copy thereof. An input packet signal is added with a time stamp indicating a relative time of an arrival of the packet, and the packet signals of digital information with the added time stamps are recorded at reduced intervals therebetween. In reproducing, a packet interval adjusting circuit restores the original packet intervals in accordance with the time stamps, and then a time stamp change circuit changes at least one bit of the time stamp and thereafter outputs the digital information.
    Type: Application
    Filed: March 10, 2009
    Publication date: October 8, 2009
    Inventors: Hitoaki Owashi, Hiroo Okamoto, Kyoichi Hosokawa, Takaharu Noguchi
  • Publication number: 20090179620
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Application
    Filed: March 13, 2009
    Publication date: July 16, 2009
    Inventors: KYOICHI HOSOKAWA, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Patent number: 7550959
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: June 23, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Patent number: 7514908
    Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: April 7, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Kyoichi Hosokawa, Ryotaro Kudo, Toshio Nagasawa, Koji Tateno
  • Publication number: 20090003803
    Abstract: A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 1, 2009
    Inventors: Hiroo Okamoto, Kyoichi Hosokawa, Hitoaki Owashi, Hiroaki Tachibana, Takaharu Noguchi
  • Publication number: 20080292282
    Abstract: A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
    Type: Application
    Filed: July 18, 2008
    Publication date: November 27, 2008
    Inventors: Hiroo Okamoto, Kyoichi Hosokawa, Hitoaki Owashi, Hiroaki Tachibana, Takaharu Noguchi
  • Publication number: 20080292283
    Abstract: A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
    Type: Application
    Filed: July 18, 2008
    Publication date: November 27, 2008
    Inventors: Hiroo Okamoto, Kyoichi Hosokawa, Hitoaki Owashi, Hiroaki Tachibana, Takaharu Noguchi
  • Publication number: 20080253743
    Abstract: An apparatus for processing a transmitted digital signal including at least one of a video signal and an audio signal. The apparatus includes a receiver which receives the transmitted digital signal, wherein the transmitted digital signal includes a video signal which is bit-compressed, an audio signal which is bit-compressed, and an error correction signal added commonly to both the video signal and the audio signal, a demodulator which demodulates the received digital signal, and an error corrector which corrects an error of the digital signal demodulated by the demodulator. A first expander bit-expands the video signal of the digital signal corrected by the error corrector, a second expander bit-expands the audio signal of the digital signal corrected by the error corrector.
    Type: Application
    Filed: October 29, 2007
    Publication date: October 16, 2008
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20080175314
    Abstract: An apparatus for receiving digital information including at least one of digital video information and digital audio information. The apparatus includes a receiver which receives the digital information that has digital video information bit-compressed by a first compression system, digital audio information bit-compressed by a second compression system, and error-detection information added to both the digital video information and the digital audio information, a demodulator which demodulates the received digital information, and an error detector which detects an error of digital information demodulated by the demodulator. A first expander bit-expands video information among the digital information which is error detected corresponding to the first compression system, and a second expander bit-expands audio information among the digital information which is error detected corresponding to the second compression system.
    Type: Application
    Filed: October 29, 2007
    Publication date: July 24, 2008
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watanai, Akira Shibata
  • Publication number: 20080129273
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Application
    Filed: January 22, 2008
    Publication date: June 5, 2008
    Inventors: Koji TATENO, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Publication number: 20080069538
    Abstract: An apparatus for receiving digital information including at least one of digital video information and digital audio information The apparatus includes a receiver which receives the digital information that has digital video information bit-compressed, digital audio information bit-compressed, and error-detection information added to both the digital video information and the digital audio information, a demodulator which demodulates the received digital information, and an error detector which detects an error of digital information demodulated by the demodulator. A first expander bit-expands the video information, and a second expander which bit-expands the audio information.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 20, 2008
    Inventors: Hideo ARAI, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 7342391
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: March 11, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Patent number: 7319808
    Abstract: A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: January 15, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroo Okamoto, Kyoichi Hosokawa, Hitoaki Owashi, Hiroaki Tachibana, Takaharu Noguchi
  • Patent number: 7286310
    Abstract: An apparatus for receiving digital information including a receiver which receives the digital information that has digital video information bit-compressed by a first compression system, digital audio information bit-compressed by a second compression system, and error-detection information added to both the digital video information and the digital audio information. There is also provided a demodulator which demodulates the digital information received by the receiver, an error detector which detects an error of digital information demodulated by the demodulator by use of the error-detection information, a first expander which bit-expands video information among the digital information error detected by the error detector corresponding system, and a second expander which bit-expands audio information among the digital information error detected by the error detector corresponding to the second compression system.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Publication number: 20070236204
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor, and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Application
    Filed: June 8, 2007
    Publication date: October 11, 2007
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa
  • Patent number: 7259926
    Abstract: A transmitting apparatus and method for transmitting a digital signal in which a time-base compressor compresses the digital signal, a bit compressor compresses the time-base compressed signal from the time-base so that a transmission rate of the time-base compressed signal from the time-base compressor is higher than a transmission rate of the bit-compressed signal from the bit-compressor, and a transmitter transmits the bit compressed signal.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: August 21, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Arai, Hitoaki Owashi, Kyoichi Hosokawa, Keizo Nishimura, Yoshizumi Watatani, Akira Shibata
  • Patent number: 7245116
    Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: July 17, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Koji Tateno, Ryotaro Kudo, Shin Chiba, Kyoichi Hosokawa, Toshio Nagasawa