Abstract: The present invention provides a switching power source and a semiconductor integrated circuit which realize an acquisition a sufficient driving voltage of a high-potential side switching element M1 even when a power source voltage VDD is low.

Abstract: A digital video signal recording method for recording on a magnetic recording medium by using a rotary head, a first digital compressed video signal having a predetermined number of bytes in a packet format and a second digital compressed video signal having a predetermined number of bytes in a packet format which is generated from said first digital compressed video signal, including: adding information representing a sequence of arrangement of said second digital compressed video signal to said second digital compressed video signal, said sequence representing information including at least information indicating a sequence within a predetermined region; and recording said second digital compressed video signal thus added, on a predetermined region on said magnetic recording medium.

Abstract: This invention provides a semiconductor integrated circuit for drive and a module for building a synchronous rectifier type switching regulator that is able to correctly detect and prevent a reverse current flowing through a coil (inductance element) during light load using a comparator and has a good power efficiency. In a synchronous rectifier type switching regulator including a reverse current detection circuit that is able to detect a state in which a reverse current flows through the inductance element (coil) and a reverse current prevention function, a switching element for synchronous rectification is formed by a plurality of parallel transistors and the transistors are controlled so that a part of them are not driven during light load.

Abstract: It is aimed at decreasing losses not only in a synchronous rectifier circuit provided at a secondary side of a DC-DC converter, but also in a full-bridge switching circuit provided at a primary side thereof. The DC-DC converter comprises a transformer for voltage conversion, a synchronous rectifier circuit at the secondary side, and a full-bridge switching circuit at the primary side. The DC-DC converter performs synchronous rectifier control which uses switch transistors to change paths of currents flowing through the secondary coil in synchronization with switching operations at the primary side. The DC-DC converter detects currents flowing through a load at the secondary side, primary-side currents varying with the load currents, or primary-side input voltages to dynamically control off-timings of a synchronous rectification transistor at the secondary side.

Abstract: An apparatus for receiving digital information including a receiver which receives the digital information that has digital video information bit-compressed by a first compression system, digital audio information bit-compressed by a second compression system, and error-detection information added to both the digital video information and the digital audio information. There is also provided a demodulator which demodulates the digital information received by the receiver, an error detector which detects an error of digital information demodulated by the demodulator by use of the error-detection information, a first expander which bit-expands video information among the digital information error detected by the error detector corresponding system, and a second expander which bit-expands audio information among the digital information error detected by the error detector corresponding to the second compression system.

Abstract: This invention provides a semiconductor integrated circuit for drive and a module for building a synchronous rectifier type switching regulator that is able to correctly detect and prevent a reverse current flowing through a coil (inductance element) during light load using a comparator and has a good power efficiency. In a synchronous rectifier type switching regulator including a reverse current detection circuit that is able to detect a state in which a reverse current flows through the inductance element (coil) and a reverse current prevention function, a switching element for synchronous rectification is formed by a plurality of parallel transistors and the transistors are controlled so that a part of them are not driven during light load.

Abstract: A transmitting apparatus and method for transmitting a digital signal in which a bit-compressor bit-compresses the digital signal, a time-base compressor time-base compresses the bit-compressed signal from the bit-compressor so that a transmission rate of the time-base compressed signal from the time-base compressor is higher than a transmission rate of the bit-compressed signal from the bit-compressor, and a transmitter transmits the time-base compressed signal.

Abstract: A digital signal receiving apparatus and method in which a receiver receives a digital signal including a video signal and an audio signal, wherein the received digital signal is bit-compressed and time-base compressed, a demodulator demodulates the received digital signal, and an expander bit-expands and time-base expands the demodulated digital signal.

Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.

Abstract: An apparatus for at least receiving digital information including digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system and transmitted to a transmission path. The receiver apparatus includes a receiver which receives the transmitted digital information, a demodulator which demodulates the digital information received by the receiver, an error detector which detects an error of a digital information demodulated by the demodulator by use of a parity signal, a first expander which bit-expands video information among digital information error detected by the error detector corresponding to the first compression system and a second expander which bit-expands audio information among digital information error detected by the error detector corresponding to the second compression system.

Abstract: In a driver circuit constructing a switching power supply device that switches power transistors passing a current through a coil by a PWM mode, a current detection transistor, which is smaller in size than the low-potential side power transistor and a current detection resistor are provided in parallel to the low-potential side power transistor. The same control voltage as the power transistor is applied to the control terminal of the current detection transistor. An operational amplifier is formed, that has the potential of the connection node between the current detection transistor and the current detection resistor applied to its inverse input terminal and a feedback loop, so as to make a pair of input terminals of the operational amplifier be at the same potential. A signal produced by the current detection resistor is thus outputted as a current detection signal.

Abstract: A digital signal recording/reproducing apparatus having a mode for recording a compressed input signal on a recording medium and a mode for recording a non-compressed input signal on the recording medium. The apparatus include input circuits which input a digital compressed signal and an analog non-compressed signal, an A/D converter, a data compressor, a mode change-over circuit which changes-over the mode, and a selector which selects either a digital compressed signal from the data compressor or a digital compressed signal from the input circuit. A recorder records a recording signal to a recording medium and a reproducer.

Abstract: The present invention provides a digital signal recording apparatus and a recording medium for recording digital compressed picture information on magnetic tape, and specifically the structure of the recording apparatus that suitably records picture trick-play data separately from recording data for a normal replay and the recording medium on which data is suitably recorded. The digital signal recording apparatus includes picture data extraction circuit (103) for extracting picture data from the input digital compressed picture signal, trick-play-data generation means (105) for generating trick-play data while reducing the extracted picture data, and data disposition circuit (106) for disposing the trick-play data on tracks in position falling in line with the trace of the rotary magnetic head scanning in trick-play mode. The trick-play-data generation means (105) operates through program processing of a microprocessor (105).

Abstract: A method and apparatus is provided for receiving and/or reproducing a digital signal, capable of efficiently recording a compressed, packeted digital signal and inhibiting a copy thereof. An input packet signal is added with a time stamp indicating a relative time of an arrival of the packet, and the packet signals of digital information with the added time stamps are recorded at reduced intervals therebetween. In reproducing, a packet interval adjusting circuit restores the original packet intervals in accordance with the time stamps, and then a time stamp change circuit changes at least one bit of the time stamp and thereafter outputs the digital information.

Abstract: It is aimed at decreasing losses not only in a synchronous rectifier circuit provided at a secondary side of a DC-DC converter, but also in a full-bridge switching circuit provided at a primary side thereof. The DC-DC converter comprises a transformer for voltage conversion, a synchronous rectifier circuit at the secondary side, and a full-bridge switching circuit at the primary side. The DC-DC converter performs synchronous rectifier control which uses switch transistors to change paths of currents flowing through the secondary coil in synchronization with switching operations at the primary side. The DC-DC converter detects currents flowing through a load at the secondary side, primary-side currents varying with the load currents, or primary-side input voltages to dynamically control off-timings of a synchronous rectification transistor at the secondary side.

Abstract: A digital signal recording/reproducing apparatus having a mode for recording a compressed input signal on a recording medium and a mode for recording a non-compressed input signal on the recording medium. The apparatus include input circuits which input a digital compressed signal and an analog non-compressed signal, an A/D converter, a data compressor, a mode change-over circuit which changes-over the mode, and a selector which selects either a digital compressed signal from the data compressor or a digital compressed signal from the input circuit. A recorder records a recording signal to a recording medium and a reproducer.

Abstract: A method and apparatus is provided for receiving and/or reproducing a digital signal, capable of efficiently recording a compressed, packeted digital signal and inhibiting a copy thereof. An input packet signal is added with a time stamp indicating a relative time of an arrival of the packet, and the packet signals of digital information with the added time stamps are recorded at reduced intervals therebetween. In reproducing, a packet interval adjusting circuit restores the original packet intervals in accordance with the time stamps, and then a time stamp change circuit changes at least one bit of the time stamp and thereafter outputs the digital information.

Abstract: An apparatus and method for transmitting and receiving digital information includes a transmitting part for transmitting digital video information and digital audio information and receiving part for receiving digital video information and digital audio information. The transmitting part includes a first compressor for digital video information, a second compressor for digital audio information, a parity signal adder, a modulator, and a transmitter. The receiving part includes a receiver which receives digital information which is digital video information bit-compressed by a first compression system plus digital audio information bit-compressed by a second compression system, and to which has been added a parity signal for error detecting, phase-modulated and transmitted to a transmission path; a demodulator; an error detector, a first expander which bit-expands video information, and a second expander which bit-expands audio information.

Abstract: A DC-DC converter of low ripple voltages which has a bi-directional power conversion means between an input power source and a smoothing capacitor and can quickly change the output voltage independently of the load. Said DC-DC converter comprises a main circuit of a non-insulated step-down DC-DC converter comprising at least two semiconductor elements, a DC reactor, and a smoothing capacitor, means for generating a variable reference voltage, means for comparing a reference voltage generated by said reference voltage generating means by the output voltage and outputting differential voltage information, means for generating a signal to be applied to the control terminals of said semiconductor element according to said differential voltage information, and means for discriminating the direction of a current flowing through said DC reactor.

Abstract: An apparatus for receiving/recording digital information. The receiving apparatus receives digital information which is a digital video information bit-compressed by a first compression system using discrete cosine transform plus digital audio information bit-compressed for error detecting, phase-modulated and transmitted to a transmission path. The receiver apparatus includes a receiver which receives the transmitted digital information, a demodulator which demodulates the digital information received by the receiver corresponding to the phase-modulation, an error detector which detects an error of a digital information demodulated by the demodulator by use of a parity signal, a first expander which bit-expands video information among digital information error detected by the error detector corresponding to the first compression system and a second expander which bit-expands audio information among digital information error detected by the error detector corresponding to the second compression system.