Abstract: The present of the invention provides a method of manufacturing a semiconductor device, including the steps of: acquiring information on a graphic composing a physical layout of a semiconductor integrated circuit; carrying out calculation for a transferred image in the physical layout; carrying out calculation for a signal delay based on the physical layout, and obtaining a wiring not meeting a specification having the signal delay previously set therein; and setting a portion into which a repeater is to be inserted based on at least one result of results obtained from the information on the graphic and calculation for the transferred image, respectively, with respect to the wiring not meeting the specification.

Abstract: Disclosed herein is a semiconductor-device manufacturing method including the steps of: computing a capacitance, a resistance as well as capacitance and resistance variations as quantities generated as a result of changing the physical layout of a semiconductor integrated circuit in a range determined in advance; dividing the physical layout of the semiconductor integrated circuit into functional blocks and analyzing the physical layout in the functional-block units; computing signal delays for each of the functional blocks from the computed capacitance, the computed resistance as well as the computed capacitance and resistance variations and from a delay table provided for element and wire sections of each of the functional blocks; and finding signal delays in all the functional blocks composing the semiconductor integrated circuit on the basis of the signal delay computed for each of the functional blocks and the basis of a result of the analysis carried out on the physical layout.

Abstract: Disclosed is a mask comprising a first area including a first surrounding area in which a halftone phase shift film or a stacked film of a halftone phase shift film and an opaque film is provided on a transparent substrate, and a first opening area surrounded by the first surrounding area, and a second area including a second surrounding area in which a halftone phase shift film is provided on the transparent substrate and a second opening area surrounded by the second surrounding area, wherein a transparent film is provided in at least a part of the second opening area, the transparent film being configured to give a predetermined phase difference to exposure light passing through that part of the second opening area in which the transparent film is provided relative to exposure light passing through the second surrounding area.

Abstract: An embodiment of the invention provides a pattern designing method, including the steps of carrying out transfer simulation calculation and step simulation calculation by using physical layout data produced from circuit design data, and comparing a result of the transfer simulation calculation and the step simulation calculation with a preset standard; and carrying out calculation for electrical characteristics by using parameters obtained from the physical layout when as a result of the comparison, the preset standard is fulfilled, and carrying out calculation for the electrical characteristics by reflecting the result of the transfer simulation calculation and the step simulation calculation in the parameters when as the result of the comparison, the preset standard is not fulfilled, thereby extracting the parameters.

Abstract: A method of designing a semiconductor integrated circuit includes a cell arranging and wiring step of arranging and wiring cells for creating a physical layout, a design-rule checking step of verifying a shape of a second physical layout including the cells of the physical layout with reference to a rule library for design rule check, a mask-data creating step of creating mask data corresponding to the physical layout using the second physical layout when the design rule is satisfied in the design-rule checking step, a mask-data processing step of performing, when the design rule is not satisfied in the design-rule checking step, mask data processing for the verification-object second physical layout, and a mask-data creating step for creating mask data corresponding to the physical layout using the second physical layout subjected to the mask data processing in the mask-data processing data.

Abstract: Disclosed is a method for manufacturing a mask for focus monitoring, comprising forming a first opening portion and a second opening portion in a surface region of a transparent substrate, the second opening portion having a pattern shape corresponding to a pattern shape of the first opening portion, and being surrounded by a stack film formed of a halftone film on the transparent substrate and an opaque film on the halftone film, and radiating a charged beam onto a first region which includes an edge of the second opening portion and inside and outside regions which are respectively located inward and outward of the edge of the second opening portion, to etch that part of the transparent substrate which corresponds to the inside region.

Abstract: A method in which a desired pattern is compared with a finish pattern to be formed on a wafer, which is predicted from a design pattern, based on a calculation of a light beam intensity, and a deviation quantity of the finish pattern from the desired pattern at each edge of the finish pattern and the desired pattern is calculated, comprising setting a reference light beam intensity for setting the desired pattern on a wafer, setting an evaluation point for comparison of the finish pattern with the desired pattern, calculating a light beam intensity at the evaluation point, calculating a differentiation value of the light beam intensity at the evaluation point, calculating an intersection of the differentiation value with the reference light beam intensity, and calculating a difference between the intersection and the evaluation point, the difference defining an edge deviation quantity of the finish pattern from the desired pattern.

Abstract: A focus monitor method comprising preparing a mask comprising a first and second focus monitor patterns and an exposure monitor pattern, the focus monitor patterns being used to form first and second focus monitor marks on a wafer, and the exposure monitor pattern being used to form exposure meters on the wafer, obtaining a exposure dependency of a relationship between a dimensions of the focus monitor marks and the defocus amount, forming the focus monitor marks and exposure monitor mark on the wafer, measuring a dimension of the exposure monitor mark to obtain an effective exposure, selecting a relationship between the dimensions of the focus monitor marks and the defocus amount corresponding to the effective exposure, measuring a dimensions of the first and second focus monitor marks, and obtaining a defocus amount in accordance with the measured dimensions of the focus monitor marks and the selected relationship.

Abstract: A method of determining a photo mask, includes specifying a mask pattern for a photo mask for a first exposure apparatus, specifying a plurality of exposure conditions allowed to be set for a second exposure apparatus, predicting a projection image of the mask pattern to be projected on a substrate by the second exposure apparatus, for each of the exposure conditions, predicting a processed pattern to be formed on a substrate surface on the basis of the projection image, for each of the exposure conditions, determining whether or not the processed pattern meets a predetermined condition for each of the exposure conditions, and determining that the photo mask is applicable to the second exposure apparatus if the processed pattern meets the predetermined condition for at least one of the exposure conditions.

Abstract: A method in which a desired pattern is compared with a finish pattern to be formed on a wafer, which is predicted from a design pattern, based on a calculation of a light beam intensity, and a deviation quantity of the finish pattern from the desired pattern at each edge of the finish pattern and the desired pattern is calculated, comprising setting a reference light beam intensity for setting the desired pattern on a wafer, setting an evaluation point for comparison of the finish pattern with the desired pattern, calculating a light beam intensity at the evaluation point, calculating a differentiation value of the light beam intensity at the evaluation point, calculating an intersection of the differentiation value with the reference light beam intensity, and calculating a difference between the intersection and the evaluation point, the difference defining an edge deviation quantity of the finish pattern from the desired pattern.

Abstract: There is disclosed a method of producing a design layout by optimizing at least one of design rule, process proximity correction parameter and process parameter, including calculating a processed pattern shape based on a design layout and a process parameter, extracting a dangerous spot having an evaluation value with respect to the processed pattern shape, which does not satisfy a predetermined tolerance, generating a repair guideline of the design layout based on a pattern included in the dangerous spot, and repairing that portion of the design layout which corresponds to the dangerous spot based on the repair guideline.

Abstract: A semiconductor circuit pattern design method includes the following operations. A design pattern is created by placing a plurality of cells in each functional block as a unit of the semiconductor circuit and executing routing among the plurality of placed cells. Mask pattern data based on the design pattern is created. A predictive pattern to be formed on the substrate by the mask pattern data is predicted. A difference amount between the predictive pattern and a target pattern to be formed on the substrate by the mask pattern data is checked. The difference amount is compared with a predetermined allowable variation amount. If the difference amount is larger than the allowable variation amount in the comparison, at least one of placement and routing of the cells in the design pattern corresponding to the mask pattern data used to predict the predictive pattern is corrected.

Abstract: Disclosed is a mask comprising a first area including a first surrounding area in which a halftone phase shift film or a stacked film of a halftone phase shift film and an opaque film is provided on a transparent substrate, and a first opening area surrounded by the first surrounding area, and a second area including a second surrounding area in which a halftone phase shift film is provided on the transparent substrate and a second opening area surrounded by the second surrounding area, wherein a transparent film is provided in at least a part of the second opening area, the transparent film being configured to give a predetermined phase difference to exposure light passing through that part of the second opening area in which the transparent film is provided relative to exposure light passing through the second surrounding area.

Abstract: A photomask has a device pattern, which has an opening portion and a mask portion, and either a focus monitor pattern or an exposure dose monitor pattern, which has an opening portion and a mask portion and which has the same plane pattern shape as at least a partial region of a device pattern. The phase difference in transmitted exposure light between the opening portion and the mask portion of the focus monitor pattern is different from that between the opening portion and the mask portion of the device pattern. The opening portion of the exposure dose monitor pattern has a different exposure dose transmittance from that of the opening portion of the device pattern.

Abstract: Disclosed is a mask comprising a first area including a first surrounding area in which a halftone phase shift film or a stacked film of a halftone phase shift film and an opaque film is provided on a transparent substrate, and a first opening area surrounded by the first surrounding area, and a second area including a second surrounding area in which a halftone phase shift film is provided on the transparent substrate and a second opening area surrounded by the second surrounding area, wherein a transparent film is provided in at least a part of the second opening area, the transparent film being configured to give a predetermined phase difference to exposure light passing through that part of the second opening area in which the transparent film is provided relative to exposure light passing through the second surrounding area.

Abstract: A pattern data correction method is disclosed, which comprises preparing an integrated circuit pattern, setting a tolerance to the pattern that is allowable error range when the pattern is transferred on a substrate, creating a target pattern within the tolerance, and making correction for the target pattern to make a first correction pattern under a predetermined condition.

Abstract: There is disclosed a method of producing a design layout by optimizing at least one of design rule, process proximity correction parameter and process parameter, including calculating a processed pattern shape based on a design layout and a process parameter, extracting a dangerous spot having an evaluation value with respect to the processed pattern shape, which does not satisfy a predetermined tolerance, generating a repair guideline of the design layout based on a pattern included in the dangerous spot, and repairing that portion of the design layout which corresponds to the dangerous spot based on the repair guideline.

Abstract: A pattern verification method comprising preparing a desired pattern and a mask pattern forming the desired pattern on a substrate, defining at least one evaluation point on an edge of the desired pattern, defining at least one process parameter to compute the transferred/formed pattern, defining a reference value and a variable range for each of the process parameters, computing a positional displacement for each first points corresponding to the evaluation point, first points computed using correction mask pattern and a plurality of combinations of parameter values obtained by varying the process parameters within the variable range or within the respective variable ranges, the positional displacement being displacement between first point and the evaluation point, computing a statistics of the positional displacements for each of the evaluation points, and outputting information modifying the mask pattern according to the statistics.

Abstract: Disclosed is a method for manufacturing a mask for focus monitoring, comprising forming a first opening portion and a second opening portion in a surface region of a transparent substrate, the second opening portion having a pattern shape corresponding to a pattern shape of the first opening portion, and being surrounded by a stack film formed of a halftone film on the transparent substrate and an opaque film on the halftone film, and radiating a charged beam onto a first region which includes an edge of the second opening portion and inside and outside regions which are respectively located inward and outward of the edge of the second opening portion, to etch that part of the transparent substrate which corresponds to the inside region.

Abstract: A method in which a desired pattern is compared with a finish pattern to be formed on a wafer, which is predicted from a design pattern, based on a calculation of a light beam intensity, and a deviation quantity of the finish pattern from the desired pattern at each edge of the finish pattern and the desired pattern is calculated, comprising setting a reference light beam intensity for setting the desired pattern on a wafer, setting an evaluation point for comparison of the finish pattern with the desired pattern, calculating a light beam intensity at the evaluation point, calculating a differentiation value of the light beam intensity at the evaluation point, calculating an intersection of the differentiation value with the reference light beam intensity, and calculating a difference between the intersection and the evaluation point, the difference defining an edge deviation quantity of the finish pattern from the desired pattern.