Patents by Inventor Larry E. Mosley

Larry E. Mosley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10483249
    Abstract: Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.
    Type: Grant
    Filed: December 26, 2015
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Edward A. Burton, Gerhard Schrom, Larry E. Mosley
  • Publication number: 20190006334
    Abstract: Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.
    Type: Application
    Filed: December 26, 2015
    Publication date: January 3, 2019
    Inventors: Donald S. GARDNER, Edward A. BURTON, Gerhard SCHROM, Larry E. MOSLEY
  • Patent number: 10122089
    Abstract: A method apparatus and material are described for radio frequency passives and antennas. In one example, an electronic component has a synthesized magnetic nanocomposite material with aligned magnetic domains, a conductor embedded within the nanocomposite material, and contact pads extending through the nanocomposite material to connect to the conductor.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Chuan Hu, Shawna M. Liff, Larry E. Mosley
  • Publication number: 20160322707
    Abstract: A method apparatus and material are described for radio frequency passives and antennas. In one example, an electronic component has a synthesized magnetic nanocomposite material with aligned magnetic domains, a conductor embedded within the nanocomposite material, and contact pads extending through the nanocomposite material to connect to the conductor.
    Type: Application
    Filed: July 11, 2016
    Publication date: November 3, 2016
    Applicant: Intel Corporation
    Inventors: Vijay K. Nair, Chuan Hu, Shawna M. Liff, Larry E. Mosley
  • Patent number: 9466662
    Abstract: In one embodiment, an energy storage device (e.g., capacitor) may include a porous silicon layer formed within a substrate. The porous silicon layer includes pores with a mean pore diameter less than approximately 100 nanometers. A first conductive layer is formed on the porous silicon layer and a first dielectric layer is formed on the first conductive layer. A second conductive layer is formed on the first dielectric layer to form the capacitor.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 11, 2016
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Larry E. Mosley
  • Patent number: 9461355
    Abstract: A method apparatus and material are described for radio frequency passives and antennas. In one example, an electronic component has a synthesized magnetic nanocomposite material with aligned magnetic domains, a conductor embedded within the nanocomposite material, and contact pads extending through the nanocomposite material to connect to the conductor.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: October 4, 2016
    Assignee: Intel Corporation
    Inventors: Vijay K. Nair, Chuan Hu, Shawna M. Liff, Larry E. Mosley
  • Patent number: 8884438
    Abstract: Magnetic microinductors formed on semiconductor packages are provided. The magnetic microinductors are formed as one or more layers of coplanar magnetic material on a package substrate. Conducting vias extend perpendicularly through the plane of the magnetic film. The magnetic film is a layer of isotropic magnetic material or a plurality of layers of anisotropic magnetic material having differing hard axes of magnetization.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: November 11, 2014
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Larry E. Mosley
  • Publication number: 20140293529
    Abstract: A method apparatus and material are described for radio frequency passives and antennas. In one example, an electronic component has a synthesized magnetic nanocomposite material with aligned magnetic domains, a conductor embedded within the nanocomposite material, and contact pads extending through the nanocomposite material to connect to the conductor.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Inventors: Vijay K. Nair, Chuan Hu, Shawna M. Liff, Larry E. Mosley
  • Publication number: 20140183694
    Abstract: In one embodiment, an energy storage device (e.g., capacitor) may include a porous silicon layer formed within a substrate. The porous silicon layer includes pores with a mean pore diameter less than approximately 100 nanometers. A first conductive layer is formed on the porous silicon layer and a first dielectric layer is formed on the first conductive layer. A second conductive layer is formed on the first dielectric layer to form the capacitor.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventors: Donald S. Gardner, Larry E. Mosley
  • Patent number: 7986532
    Abstract: An apparatus includes a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits. Such capacitor may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: July 26, 2011
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7884695
    Abstract: A low-resistance inductor is made from a plurality of first inter-abutting insulated electrode coil sub-segments that is coupled to a plurality of second intra-abutting insulated electrode coil sub-segments that are contiguous to the plurality of first intra-abutting coil sub-segments. The first plurality and the second plurality form an helical inductor unit cell. A process of forming the low-resistance inductor includes heat curing. A system includes a low-resistance inductor and a mounting substrate.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: February 8, 2011
    Assignee: Intel Corporation
    Inventors: Larry E. Mosley, Clive R. Hendricks
  • Publication number: 20100259911
    Abstract: Magnetic microinductors formed on semiconductor packages are provided. The magnetic microinductors are formed as one or more layers of coplanar magnetic material on a package substrate. Conducting vias extend perpendicularly through the plane of the magnetic film. The magnetic film is a layer of isotropic magnetic material or a plurality of layers of anisotropic magnetic material having differing hard axes of magnetization.
    Type: Application
    Filed: June 25, 2010
    Publication date: October 14, 2010
    Inventors: Donald S. Gardner, Larry E. Mosley
  • Patent number: 7810234
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: October 12, 2010
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7724498
    Abstract: A low-inductance capacitor exhibits a first characteristic inductance during use in a first capacitor subsection and a second characteristic inductance during use in a second capacitor subsection, and the first and second characteristic inductances act to neutralize each other. A process of forming the low-inductance capacitor includes heat curing. A package includes a low-inductance capacitor and a mounting substrate.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 25, 2010
    Assignee: Intel Corporation
    Inventors: Larry E. Mosley, Clive R. Hendricks
  • Publication number: 20090284944
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Application
    Filed: July 27, 2009
    Publication date: November 19, 2009
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7586756
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: September 8, 2009
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7505248
    Abstract: A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: March 17, 2009
    Assignee: Intel Corporation
    Inventors: Behrooz Z. Mehr, Juan P. Soto, Nicholas Holmberg, Kevin M. Lenio, Larry E. Mosley
  • Publication number: 20080305603
    Abstract: A capacitor may be formed of carbon nanotubes. Carbon nanotubes, grown on substrates, may be formed in a desired pattern. The pattern may be defined by placing catalyst in appropriate locations for carbon nanotube growth from a substrate. Then, intermeshing arrays of carbon nanotubes may be formed by juxtaposing the carbon nanotubes formed on opposed substrates. In some embodiments, the carbon nanotubes may be covered by a dielectric which may be adhered by functionalizing the carbon nanotubes.
    Type: Application
    Filed: August 11, 2008
    Publication date: December 11, 2008
    Inventors: Larry E. Mosley, James G. Maveety, Edward R. Prack
  • Patent number: 7428138
    Abstract: A capacitor may be formed of carbon nanotubes. Carbon nanotubes, grown on substrates, may be formed in a desired pattern. The pattern may be defined by placing catalyst in appropriate locations for carbon nanotube growth from a substrate. Then, intermeshing arrays of carbon nanotubes may be formed by juxtaposing the carbon nanotubes formed on opposed substrates. In some embodiments, the carbon nanotubes may be covered by a dielectric which may be adhered by functionalizing the carbon nanotubes.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: September 23, 2008
    Assignee: Intel Corporation
    Inventors: Larry E. Mosley, James G. Maveety, Edward R. Prack
  • Publication number: 20080048813
    Abstract: A low-resistance inductor is made from a plurality of first inter-abutting insulated electrode coil sub-segments that is coupled to a plurality of second intra-abutting insulated electrode coil sub-segments that are contiguous to the plurality of first intra-abutting coil sub-segments. The first plurality and the second plurality form an helical inductor unit cell. A process of forming the low-resistance inductor includes heat curing. A system includes a low-resistance inductor and a mounting substrate.
    Type: Application
    Filed: June 30, 2006
    Publication date: February 28, 2008
    Inventors: Larry E. Mosley, Clive R. Hendricks