Patents by Inventor Larry E. Mosley

Larry E. Mosley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low inductance high capacitance capacitor and method of making same
    Patent number: 6262877
    Abstract: A capacitor with low inductance connection terminals and having a first surface, includes a first electrode of porous metal, a dielectric layer formed on the porous metal, a second electrode formed on the dielectric layer, and a plurality of connection terminals electrically coupled to the first electrode on the first surface and a plurality of connection terminals electrically coupled to the second electrode on the first surface.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: July 17, 2001
    Assignee: Intel Corporation
    Inventor: Larry E. Mosley
  • Semiconductor package substrate with power die
    Patent number: 6075285
    Abstract: An apparatus that efficiently delivers electrical power and lowers the inductance to an integrated circuit. In one embodiment, the present invention includes an apparatus for delivering electrical power to an integrated circuit comprising two planes, substantially parallel to one another, having many ground and power traces. The ground and power traces of the separate planes are connected together and connected to the integrated circuit, thereby providing power to the integrated circuit. In each individual plane, the ground and power traces are substantially parallel to each other, one array of traces in one plane substantially perpendicular to another array of traces in another plane. The apparatus being electrically coupled to a printed circuit board having at least one decoupling capacitor with first and second electrodes coupled to at least two of the ground and power connections, respectively, of the integrated circuit through the printed circuit board, and the first and second ground and power planes.
    Type: Grant
    Filed: December 15, 1997
    Date of Patent: June 13, 2000
    Assignee: Intel Corporation
    Inventors: Gregory F. Taylor, George L. Geannopoulos, Larry E. Mosley
  • Method and apparatus for a microprocessor to enter and exit a reduced power consumption state
    Patent number: 5537656
    Abstract: A method and apparatus for placing a microprocessor in and out of a reduced power consumption state utilizing system interrupts in a computer system. The method of the present invention intercepts instructions being executed by the processor before placing the processor in a reduced power consumption state. On a request for the processor to exit the reduced power consumption state, the method of the present inventions allows the processor to execute pre-determined resume instructions to wait out any voltage level fluctuations in the processor as it exits the reduced power consumption state, before allowing the processor to continue execution of the instructions intercepted prior to placing the processor in the reduced power consumption state.
    Type: Grant
    Filed: June 17, 1994
    Date of Patent: July 16, 1996
    Assignee: Intel Corporation
    Inventors: Thomas J. Mozdzen, Larry E. Mosley