Abstract: A power transceiver device includes a housing, a circuit module and an electrical connector. The circuit module is located within the housing. The electrical connector includes a terminal base and two conductive terminals. The terminal base is fixed on one side surface of the housing. Each of the conductive terminals includes a sheet, an extending portion and an opening. One end of the sheet extends through a front face of the terminal base, another end thereof is electrically connected to the circuit module. The extending portion extends transversely from the end of the sheet, the opening is firmed on the extending portion, and a virtual axis of the opening passes through the front lateral face of the terminal base. The conductive terminals are switchably electrically connected to each other.

Abstract: Disclosed is a light field technology-based unmanned aerial vehicle monitoring system. Said unmanned aerial vehicle monitoring system comprises: a first camera, configured to continuously obtain image information in a monitored area; a second camera, the second camera being a light field camera including a compound eye lens, and being configured to obtain, when it is determined that the obtained image information is of an unmanned aerial vehicle, light field information of the unmanned aerial vehicle; a vertical rotating platform and a horizontal rotating platform arranged perpendicular to each other, wherein the first camera and the second camera can rotate synchronously under the control of the vertical rotating platform and the horizontal rotating platform; and a computer processor, configured to calculate depth information of the unmanned aerial vehicle by means of the obtained light field information so as to obtain the position of the unmanned aerial vehicle.

Abstract: An interconnect structure on a semiconductor die includes: a lower conductive layer; an upper conductive layer disposed above the lower conductive layer; and a VIA disposed between the lower conductive layer and the upper conductive layer. The VIA includes: a primary interconnect structure and a sacrificial stress barrier ring disposed around the primary interconnect structure and separated a distance from the primary interconnect structure. A fabrication method for the interconnect structure includes: forming a dielectric layer over a lower conductive layer; patterning photoresist (PR) layer over the dielectric layer to define a location for a plurality of VIA trenches, wherein the patterning includes patterning the PR layer to provide a center opening for the VIA trenches that is surrounded by a ring opening for the VIA trenches, wherein the center opening and the ring opening are spaced apart.

Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first source/drain (S/D) epitaxial feature disposed over a substrate, a second S/D epitaxial feature adjacent the first S/D epitaxial feature, and a hybrid fin disposed between the first and second S/D epitaxial features. The hybrid fin includes a first dielectric material, a second dielectric material disposed on the first dielectric material, a dielectric layer surrounding the first and second dielectric materials, and a high-k dielectric layer disposed in the first and second dielectric materials. The high-k dielectric layer has an upper surface located at a level between a level of an upper surface of the second dielectric material and a level of a lower surface of the second dielectric material.

Abstract: A landing pad is provided. The landing pad includes a first body, a second body, an elastic component, and a fastening component. The first body includes a pad portion and a first coupling portion. The pad portion is configured for landing of a drone. The first coupling portion is connected to the pad portion. The second body includes a mounting portion and a second coupling portion. The mounting portion is configured for mounting to a position to be mounted. The second coupling portion is connected to the mounting portion. The second coupling portion is configured for coupling with the first coupling portion. The elastic component is disposed between the first coupling portion and the second coupling portion. The fastening component is configured for combination of the first coupling portion, the second coupling portion, and the elastic component.

Abstract: The present disclosure relates to an integrated circuit. The integrated circuit has a plurality of bit-line stacks disposed over a substrate and respectively including a plurality of bit-lines stacked onto one another. A data storage structure is over the plurality of bit-line stacks and a selector is over the data storage structure. A word-line is over the selector. The selector is configured to selectively allow current to pass between the plurality of bit-lines and the word-line. The plurality of bit-line stacks include a first bit-line stack, a second bit-line stack, and a third bit-line stack. The first and third bit-line stacks are closest bit-line stacks to opposing sides of the second bit-line stack. The second bit-line stack is separated from the first bit-line stack by a first distance and is further separated from the third bit-line stack by a second distance larger than the first distance.

Abstract: An integrated circuit (IC) structure includes a semiconductor substrate, a first gate line, a second gate line, and a first auxiliary gate portion. The semiconductor substrate comprises a semiconductor fin. The semiconductor fin extends substantially along a first direction. The first gate line and the second gate line extend substantially along a second direction different form the first direction from a top view. The first auxiliary gate portion connects the first gate line to the second gate line from the top view.

Abstract: A vacuum apparatus includes process chambers, and a transfer chamber coupled to the process chambers. The transfer chamber includes one or more vacuum ports, thorough which a gas inside the transfer chamber is exhausted, and vent ports, from which a vent gas is supplied. The one or more vacuum ports and the vent ports are arranged such that air flows from at least one of the vent ports to the one or more vacuum ports are line-symmetric with respect to a center line of the transfer chamber.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.

Abstract: A micro light-emitting diode display panel includes a substrate, at least one light-emitting element, a reflective layer and a light-absorbing layer. The at least one light-emitting element is disposed on the substrate to define at least one pixel, and each light-emitting element includes micro light-emitting diodes. The reflective layer is disposed on the substrate and located between the micro light-emitting diodes. The reflective layer has cavities surrounding the micro light-emitting diodes, such that a thickness of a portion of the reflective layer close to any one of the micro light-emitting diodes is greater than a thickness of a portion of the reflective layer away from the corresponding micro light-emitting diode. The light-absorbing layer is at least disposed in the cavities of the reflective layer.

Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.

Abstract: A semiconductor device structure and a formation method are provided. The method includes forming a dummy gate stack over a substrate and forming a dielectric layer laterally surrounding the dummy gate stack. The method also includes introducing dopants into an upper portion of the dielectric layer and removing the dummy gate stack to form a trench surrounded by the dielectric layer. The method further includes forming a metal gate stack in the trench.

Abstract: A magnetic assembly includes a first magnetic core, a second magnetic core, at least one circuit board, and multiple pillars. The second magnetic core and the first magnetic core are assembled with each other to define an internal space. The circuit board is disposed in the internal space. The circuit board has multiple through holes separated from each other. The pillars are located in the internal space and respectively correspond to the through holes passing through the circuit board, and multiple air gaps are formed between the pillars or between the pillars and at least one of the first magnetic core and the second magnetic core.

Abstract: Disclosed is a device for impregnation using electrophoresis, which includes a chassis, a storing unit, a pipeline unit, an injection unit, a bearing tank, a first driver element and a second driver element, wherein the storing unit has several storage tanks storing the materials for impregnation. The pipeline unit has several pipelines connecting the storage tanks and the injection unit. The injection unit has a static mixing tube and an injector, so as to inject said materials for impregnation into the several slide sets located in the bearing tank. The first driver element drives the bearing tank to reciprocate transversely, and the second driver element drives the injection unit to shift up and down. The device can perform impregnation operations automatically, with quick operation and low operational difficulty level, while the prepared gel has high quality stability and yield.

Abstract: A cabinet with filter life prediction function and a method of predicting filter life are provided. The cabinet has an airflow module generating airflow flowing through a filter module. An air quality sensor continuously monitors the air quality sensing value of the airflow and records the sensed value in association with the sensing time. A regression analysis is performed based on the record data to obtain a regression model when a modeling condition is met. When a prediction condition is met, a time period for the currently sensed value to decrease to a threshold is calculated to be a predicted remaining life of the filter module. A notification is generated when the predicted remaining life of the filter module is less than a life threshold.

Abstract: A visibility meter, a street light device and an operation method thereof are provided. The visibility measurement method includes: transmitting a visible laser through an optical transmitter; receiving the visible laser through an optical sensor to generate a sensed result; and calculating a visibility according to the sensed result.

Abstract: An optical device including a Vertical-Cavity Surface-Emitting Laser (VCSEL) light source and a lens array is provided. The VCSEL light source is configured to emit light with at least one light dot. The lens array is configured to receive light emitting from the VCSEL light source and then project a structured light. The structured light includes a dot pattern having number of light dots. Plural convex lenses are arranged along a first surface of the lens array. The convex lenses are configured to generate the light dots of the dot pattern.

Abstract: Disclosed is a device for impregnation using electrophoresis, which includes a chassis, a storing unit, a pipeline unit, an injection unit, a bearing tank, a first driver element and a second driver element, wherein the storing unit has several storage tanks storing the materials for impregnation. The pipeline unit has several pipelines connecting the storage tanks and the injection unit. The injection unit has a static mixing tube and an injector, so as to inject said materials for impregnation into the several slide sets located in the bearing tank. The first driver element drives the bearing tank to reciprocate transversely, and the second driver element drives the injection unit to shift up and down. The device can perform impregnation operations automatically, with quick operation and low operational difficulty level, while the prepared gel has high quality stability and yield.