Patents by Inventor Liang-Pin Tai

Liang-Pin Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060273769
    Abstract: A pulse-width-modulation (PWM) control system with nonlinear ramp is disclosed. A nonlinear ramp generator generates a nonlinear ramp varied with the duty (Vout/Vin) in a waveform signal, which could be a logarithm ramp, an exponent ramp, a multi-piecewise-linear ramp, a power ramp or a combination of above. The slope of the ramp is not a constant due to the non-linear characteristic. The voltage Vramp will vary with the input voltage Vin, output voltage Vout, and duty (Vout/Vin), therefore it will reduce the influence of the input voltage Vin or output voltage Vout on the modulation gain and loop gain, even to keep the modulation gain and loop gain in constant value. As mentioned-above, the present invention improves the transient response of system, the sensitivity for variation of Vin and Vout, thus it is capable of correcting the output voltage quickly, for supplying a more steady power output.
    Type: Application
    Filed: November 9, 2005
    Publication date: December 7, 2006
    Inventors: Tsai-Fu Chang, Liang-Pin Tai
  • Publication number: 20060261790
    Abstract: A direct current voltage boosting/bucking device includes a direct current voltage boosting circuit and a low drop-out (LDO) linear voltage converting circuit. The direct current voltage boosting circuit boosts an input voltage so as to generate an output voltage higher than the input voltage. The LDO linear voltage converting circuit converts the output voltage into a load voltage that is to be provided to a load, and controls the direct current voltage boosting circuit in accordance with a feedback signal from the load such that the output voltage and the load voltage have a minimum drop-out voltage differential therebetween and such that current flow through the load is maintained at a determined level.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 23, 2006
    Inventors: Liang-Pin Tai, Chun-Tsung Chen, Chin-Chiang Yeh, Po-Shun Chung, Kwan-Jen Chu, Chung-Lung Pai
  • Patent number: 7049800
    Abstract: A switching mode voltage regulator comprises a pulse width modulator and an adjustable one-shot circuit to generate an adjustable signal based on an input voltage, an adjustable voltage, and a PWM signal from the pulse width modulator at light loading to switch a high-side switch of an output stage in the voltage regulator. The ON duty of the adjustable signal is controlled by the adjustable voltage, such that it will be larger than that of the PWM signal and as a result, the number of switching the switch of the output stage is decreased, thereby reducing the switching loss and improving the efficiency of the voltage regulator.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: May 23, 2006
    Assignee: Richtek Technology Corp.
    Inventors: Jian-Rong Huang, Liang-Pin Tai, Hung-I Wang, Chung-Lung Pai, Jing-Mong Liu
  • Patent number: 7026800
    Abstract: In a method for a DC-DC power conversion performed by a switching mode buck voltage converter, the power conversion is split into two or more stages, and a feed-forward signal is generated by one of the stages and sent to another stage prior thereto. The feed-forward signal is generated by responding to a load current transient, such as output voltage drop, ON-duty increment or decrement occurred in the PWM control loop, error amp output swinging, and any other detectable signals in response to load current transient of the voltage converter. As a result, the performance of the DC-DC voltage converter is improved due to the prior stage modulated early in time, and both lower ripple current and peak current in steady state operations and fast response to load current transient conditions could be simultaneously obtained.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: April 11, 2006
    Assignee: Richtek Technology Corp.
    Inventors: Jing-Meng Liu, Liang-Pin Tai, Der-Jiunn Wang
  • Patent number: 7023253
    Abstract: In a noise sensitivity improved switching system and method thereof, comprised sensing the output voltage of the switching system to generate a feedback signal, respectively amplifying the feedback signal by two gains to generate two signals in phase or out of phase, filtering one of the two amplified signals, and summing or comparing the filtered signal and the other one, thereby reducing the noise interference to the switching system.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: April 4, 2006
    Assignee: Richtek Technology Corp.
    Inventors: Jian-Rong Huang, Kuo-Ping Liu, Kent Huang, Liang-Pin Tai
  • Publication number: 20060055446
    Abstract: Electronic circuits use low-cost depletion-mode JFET to serve as power switch. Since depletion-mode JFET has smaller conductive resistance and is majority carrier device, the energy loss is less when current flows through the depletion-mode JFET, and faster switching speed is obtained, thereby enhancing the efficiency of the electronic circuits.
    Type: Application
    Filed: September 8, 2005
    Publication date: March 16, 2006
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Publication number: 20060049815
    Abstract: In a voltage regulator including an error amplifier to generate a first signal related to an output voltage of the voltage regulator, a current sense circuit to generate a second signal related to an inductor current of the voltage regulator, and a PWM comparator to generate a PWM signal in response to the first and second signals to regulate the output voltage, a current feed-through adaptive voltage position control comprises supplying ramp signal and offset signal to modify the PWM signal to thereby elliminate the offset of the output voltage.
    Type: Application
    Filed: September 8, 2005
    Publication date: March 9, 2006
    Inventors: Hsin-Hsin Ho, Liang-Pin Tai, Hung-I Wang, Jian-Rong Huang, Jiun-Chiang Chen
  • Publication number: 20060043943
    Abstract: A fixed-frequency current mode converter comprises a power stage to produce an inductor current and an output voltage, an error amplifier to generate an error signal from the difference between the output voltage and a reference voltage varied with the inductor current, a comparator to compare the error signal with a ramp signal varied with the inductor current to generate a comparison signal, and a PWM generator to generate a PWM signal in response to a fixed-frequency clock and the comparison signal to drive the power stage. A second comparator is further comprised to compare the error signal with a second reference voltage varied with the inductor current, and generates a second comparison signal to reset the clock when the error signal is lower than the second reference voltage.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Inventors: Kent Huang, Liang-Pin Tai
  • Publication number: 20060012346
    Abstract: An overshoot suppression circuit comprises a switch for coupling to an output of a voltage regulation module and a voltage detector for detecting an output voltage at the output. When the load to the voltage regulation module changes from heavy to light to result in the output voltage higher than a threshold, the voltage detector turns on the switch to release energy from the output, and thereby the output voltage is suppressed to produce overshoot to damage the load coupled to the output.
    Type: Application
    Filed: July 14, 2005
    Publication date: January 19, 2006
    Inventors: Jian-Rong Huang, Liang-Pin Tai, Peng-Ju Lan
  • Publication number: 20060002159
    Abstract: For a PWM controller chip in a voltage converter to switch a pair of high side and low side switches connected with a phase node therebetween, a circuit comprises a sense resistor connected between a multi-function pin on the PWM controller chip and the phase node, and an enable arrangement, a power sensing arrangement, and an over-current protection arrangement to detect the voltage on the multi-function pin for accomplishing enable function, power sensing, and over-current protection, respectively.
    Type: Application
    Filed: July 1, 2005
    Publication date: January 5, 2006
    Inventors: Pao-Chuan Lin, Chin-Hui Wang, Liang-Pin Tai
  • Publication number: 20050285158
    Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.
    Type: Application
    Filed: June 24, 2005
    Publication date: December 29, 2005
    Inventors: Liang-Pin Tai, Jing-Meng Liu, Hung-Der Su
  • Publication number: 20050285118
    Abstract: A switching circuit uses multiple common-drain JFETs to serve as the low-side switches of the switching circuit, and each of the low-side JFET is coupled between a high-side switch and a power node. Since a JFET can endure high voltage at both drain side and source side, and has good heat dissipation capability at drain side, the drain of the low-side JFET is coupled to the power node to enhance the heat dissipation capability and accordingly, all the low-side JFETs are allowed to be packaged in a same package to reduce the PCB layout area.
    Type: Application
    Filed: June 23, 2005
    Publication date: December 29, 2005
    Inventors: Liang-Pin Tai, Jiun-Chiang Chen
  • Patent number: 6969980
    Abstract: A pulse width modulator includes an amplifier module, a comparator module, and a filter module. The amplifier module receives a feedback voltage signal from a passive network, and generates first and second non-inverted voltage signals and first and second inverted voltage signals in response to the feedback voltage signal. The comparator module receives the first and second non-inverted voltage signals and the first and second inverted voltage signals, and provides first and second differential voltage signals corresponding to the first and second non-inverted voltage signals and the first and second inverted voltage signals. The filter module is coupled between the amplifier module and the comparator module, and is operable so as to attenuate high frequency components of the first and second non-inverted voltage signals. As such, the presence of noise in the feedback voltage signal does not affect differential operation of the comparator module.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: November 29, 2005
    Assignee: Richtek Technology Corp.
    Inventors: Liang-Pin Tai, Kent Hwang, Jian-Rong Huang, Kuo-Ping Liu, Cheng-Hsuan Fan, Ko-Cheng Wang, Yu-Fan Liao
  • Publication number: 20050258813
    Abstract: A pulse width modulator includes an amplifier module, a comparator module, and a filter module. The amplifier module receives a feedback voltage signal from a passive network, and generates first and second non-inverted voltage signals and first and second inverted voltage signals in response to the feedback voltage signal. The comparator module receives the first and second non-inverted voltage signals and the first and second inverted voltage signals, and provides first and second differential voltage signals corresponding to the first and second non-inverted voltage signals and the first and second inverted voltage signals. The filter module is coupled between the amplifier module and the comparator module, and is operable so as to attenuate high frequency components of the first and second non-inverted voltage signals. As such, the presence of noise in the feedback voltage signal does not affect differential operation of the comparator module.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Liang-Pin Tai, Kent Hwang, Jian-Rong Huang, Kuo-Ping Liu, Cheng-Hsuan Fan, Ko-Cheng Wang, Yu-Fan Liao
  • Publication number: 20050258458
    Abstract: To turn on a JFET, a two-stage turn-on current control is employed in a JFET driver circuit and a JFET driving method, by which a shortly pulsed high sourcing current is provided to turn on the JFET rapidly and efficiently, and a continuous low sourcing current is provided after the JFET turns on for reducing the power dissipation. After the JFET turns off, a negative charge pump is also employed to promise the JFET at a turn-off state. A special power sequence is further employed to ensure the JFET could be turned off during the power supply coupled to the JFET starts up.
    Type: Application
    Filed: May 13, 2005
    Publication date: November 24, 2005
    Inventors: Hung-I Wang, Liang-Pin Tai
  • Publication number: 20050253567
    Abstract: A two-step DC-to-DC converter comprises a first converter stage for converting a first voltage to a second voltage, and a second converter stage for converting the second voltage to an output voltage. The first converter stage uses a MOSFET or normally-off JFET to serve as a high-side switch, and the second converter stage comprises a multi-phase modulator using a normally-on JFET to serve as a high-side switch, thereby improving the efficiency of the two-step DC-to-DC converter.
    Type: Application
    Filed: April 26, 2005
    Publication date: November 17, 2005
    Inventors: Liang-Pin Tai, Jiun-Chiang Chen
  • Patent number: 6960905
    Abstract: In a time-sharing current sense circuit for a multi-phase converter, a common transconductive amplifier is selectively connected to the channels of the converter power stage by a plurality of first switches under the control of a set of control clocks to detect the channel current of a selected channel among the channels so as to generate a sense current, and a sense current generated by the common transconductive amplifier from the sensed channel current is switched by a plurality of second switches under the control of the same control clocks to connect to one of a plurality of sampling-and-holding circuits each corresponding to one of the channels to generate a current sense signal to modulate the channel current of the selected channel.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: November 1, 2005
    Assignee: Richtek Technology Corp.
    Inventors: Jiun-Chiang Chen, Hsin-Hsin Ho, Hung-I Wang, Liang-Pin Tai
  • Publication number: 20050219926
    Abstract: A real current sense apparatus for a DC-to-DC converter uses a current mirror composed by two JFETs to mirror the output current of the converter to generate a temperature-independent mirror current to further generate a current sense signal. Due to the temperature-independence of the mirror current, the current sense signal is also temperature-independent.
    Type: Application
    Filed: March 28, 2005
    Publication date: October 6, 2005
    Inventors: Liang-Pin Tai, Jiun-Chiang Chen
  • Patent number: 6946823
    Abstract: A delta-sigma DC-to-DC converter comprises a pair of high-side and low-side switches switched to convert an input voltage to an output voltage, a sense circuit to sense the output voltage of the converter to generate a feedback signal, a transconductive amplifier to amplify a difference between the feedback signal and a threshold signal to generate a differential current, a charging circuit connected with the differential current to generate a charging voltage, and a driver to compare the charging voltage with two reference signals to generate the pair of low-side and high-side driving signals.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: September 20, 2005
    Assignee: Richtek Technology Corp.
    Inventors: Kent Huang, Liang-Pin Tai, Hung-I Wang, Jian-Rong Huang, Kuo-Ping Liu, Yu-Fan Liao
  • Patent number: 6927960
    Abstract: A circuit protection device includes an overheat protecting circuit connected to a main circuit and capable of being activated so as to shut down the main circuit when operating temperature of the main circuit reaches a predetermined value, and a current limiting circuit connected to the main circuit for preventing current through the main circuit from exceeding a predetermined threshold value. The current limiting circuit is further connected to the overheat protecting circuit and controls activation of the overheat protecting circuit when the current through the main circuit reaches the predetermined threshold value. Therefore, erroneous operation of the circuit protection device due to a shift in component characteristics of the overheat protecting circuit attributed to limitations in fabrication can be avoided.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: August 9, 2005
    Assignee: Richtek Technology Corp.
    Inventors: Jian-Rong Huang, Liang-Pin Tai, Jing-Meng Liu