Abstract: In a time-sharing current sense circuit for a multi-phase converter, a common transconductive amplifier is selectively connected to the channels of the converter power stage by a plurality of first switches under the control of a set of control clocks to detect the channel current of a selected channel among the channels so as to generate a sense current, and a sense current generated by the common transconductive amplifier from the sensed channel current is switched by a plurality of second switches under the control of the same control clocks to connect to one of a plurality of sampling-and-holding circuits each corresponding to one of the channels to generate a current sense signal to modulate the channel current of the selected channel.

Abstract: A current sense apparatus and method comprises a common drain DMOSFET and a MOSFET connected in series between a high voltage and a low voltage to serve as an output stage. The DMOSFET produces a phase output current, a mirror current mirrored from the phase output current, and a sense voltage. A servo amplifier is connected with the mirror current and sense voltage to produce a current sense signal. Due to the mirror current from the DMOSFET proportional to the phase output current, the current sense apparatus senses the phase output current in a temperature independent manner.

Abstract: In a noise sensitivity improved switching system and method thereof, comprised sensing the output voltage of the switching system to generate a feedback signal, respectively amplifying the feedback signal by two gains to generate two signals in phase or out of phase, filtering one of the two amplified signals, and summing or comparing the filtered signal and the other one, thereby reducing the noise interference to the switching system.

Abstract: A two-step ripple-free multi-phase buck converter and method thereof comprises a first-stage voltage regulator to convert an input voltage to an intermediate voltage and a second-stage voltage regulator with a phase number not less than two to further convert the intermediate voltage to an output voltage by a split phase control, in which the ratio of the intermediate voltage to the output voltage is intended to the phase number such that the steady state output current of the converter approaches to be ripple-free, and hence the drivers and MOSFETs for the second-stage voltage regulator are lower cost, the efficiency of the second-stage voltage regulator is improved, and a higher slew rate current is obtained for transient driving capabilities.

Abstract: A switching regulator with improved load transient efficiency comprises an output stage to generate an output voltage, a pulse width modulation circuit to generate a pulse width modulation signal, a constant ON-time circuit to generate an ON-time signal in accordance with the pulse width modulation signal to drive the output stage, and a masking apparatus to mask the ON-time signal by the pulse width modulation signal to thereby drive the output stage during load transient. During load transient, the masking apparatus reduces the switching times of the output stage to thereby reduce the switching loss and thus improve the efficiency of the regulator.

Abstract: A delta-sigma DC-to-DC converter comprises a pair of high-side and low-side switches switched to convert an input voltage to an output voltage, a sense circuit to sense the output voltage of the converter to generate a feedback signal, a transconductive amplifier to amplify a difference between the feedback signal and a threshold signal to generate a differential current, a charging circuit connected with the differential current to generate a charging voltage, and a driver to compare the charging voltage with two reference signals to generate the pair of low-side and high-side driving signals.

Abstract: A DC-to-DC converter comprises a sense circuit to sense the output voltage of the converter to generate a feedback signal, a transconductive amplifier to amplify a difference between the feedback signal and a threshold signal to generate a first current and to generate a second current in response to a load transient, a charging circuit connected with the first current to generate a charging voltage, a driver to compare the charging voltage with two reference signals to generate a pair of low-side and high-side driving signals, and a fast response circuit to compare a load transient signal corresponding to the second current with a third reference signal to generate a bypass signal to drive the output stage of the converter in the load transient.

Abstract: A current sense apparatus and method comprises a common drain DMOSFET and a MOSFET connected in series between a high voltage and a low voltage to serve as an output stage. The DMOSFET produces a phase output current, a mirror current mirrored from the phase output current, and a sense voltage. A servo amplifier is connected with the mirror current and sense voltage to produce a current sense signal. Due to the mirror current from the DMOSFET proportional to the phase output current, the current sense apparatus senses the phase output current in a temperature independent manner.

Abstract: A current sense apparatus and method comprises a common drain DMOSFET and a MOSFET connected in series between a high voltage and a low voltage to serve as an output stage. The DMOSFET produces a phase output current, a mirror current mirrored from the phase output current, and a sense voltage. A servo amplifier is connected with the mirror current and sense voltage to produce a current sense signal. Due to the mirror current from the DMOSFET proportional to the phase output current, the current sense apparatus senses the phase output current in a temperature independent manner.

Abstract: A voltage reference circuit includes a current source unit, a voltage-difference creating unit, and a resistance ratio unit. The current source unit receives an input current source and produces two current sources in equal current. The voltage-difference creating unit includes a first MOS device and a second MOS device to respectively receive the two current sources, wherein the first MOS device and a second MOS device has a threshold voltage difference. The resistance ratio unit includes a first resistor and a second resistor coupled in cascade, wherein the threshold voltage difference is applied to the first resistor. By adjusting a ratio of the first resistor to the second resistor, the resistance ratio unit produces a voltage reference, which is also fed back to the current source unit to ensure that the first current source and the second current source are equal.

Abstract: A switching mode voltage regulator comprises a pulse width modulator and an adjustable one-shot circuit to generate an adjustable signal based on an input voltage, an adjustable voltage, and a PWM signal from the pulse width modulator at light loading to switch a high-side switch of an output stage in the voltage regulator. The ON duty of the adjustable signal is controlled by the adjustable voltage, such that it will be larger than that of the PWM signal and as a result, the number of switching the switch of the output stage is decreased, thereby reducing the switching loss and improving the efficiency of the voltage regulator.

Abstract: In a method for a DC-DC power conversion performed by a switching mode buck voltage converter, the power conversion is split into two or more stages, and a feed-forward signal is generated by one of the stages and sent to another stage prior thereto. The feed-forward signal is generated by responding to a load current transient, such as output voltage drop, ON-duty increment or decrement occurred in the PWM control loop, error amp output swinging, and any other detectable signals in response to load current transient of the voltage converter. As a result, the performance of the DC-DC voltage converter is improved due to the prior stage modulated early in time, and both lower ripple current and peak current in steady state operations and fast response to load current transient conditions could be simultaneously obtained.

Abstract: To balance the current of individual channel as well as regulate the output voltage for a multi-phase DC-to-DC buck converter, the converter output voltage is sensed and compared with a reference signal to produce a first error signal serving as first control signal for PWM signals of the converter and the channel currents are sensed, summed, averaged and subtracted to produce second error signals that are further modified by saw-tooth wave signal to produce second control signals for the PWM signals. Moreover, the reference signal is controlled by the summed channel currents for adjustable load regulation.

Abstract: To balance the current of individual channel as well as regulate the output voltage for a multi-phase DC-to-DC buck converter, the converter output voltage is sensed and compared with a reference signal to produce a first error signal serving as first control signal for PWM signals of the converter and the channel currents are sensed, summed, averaged and subtracted to produce second error signals that are further modified by saw-tooth wave signal to produce second control signals for the PWM signals. Moreover, the reference signal is controlled by the summed channel currents for adjustable load regulation.

Abstract: A current sense apparatus and method comprises a common drain DMOSFET and a MOSFET connected in series between a high voltage and a low voltage to serve as an output stage. The DMOSFET produces a phase output current, a mirror current mirrored from the phase output current, and a sense voltage. A servo amplifier is connected with the mirror current and sense voltage to produce a current sense signal. Due to the mirror current from the DMOSFET proportional to the phase output current, the current sense apparatus senses the phase output current in a temperature independent manner.

Abstract: A two-step ripple-free multi-phase buck converter and method thereof comprises a first-stage voltage regulator to convert an input voltage to an intermediate voltage and a second-stage voltage regulator with a phase number not less than two to further convert the intermediate voltage to an output voltage by a split phase control, in which the ratio of the intermediate voltage to the output voltage is intended to the phase number such that the steady state output current of the converter approaches to be ripple-free, and hence the drivers and MOSFETs for the second-stage voltage regulator are lower cost, the efficiency of the second-stage voltage regulator is improved, and a higher slew rate current is obtained for transient driving capabilities.

Abstract: A circuit protection device includes an overheat protecting circuit connected to a main circuit and capable of being activated so as to shut down the main circuit when operating temperature of the main circuit reaches a predetermined value, and a current limiting circuit connected to the main circuit for preventing current through the main circuit from exceeding a predetermined threshold value. The current limiting circuit is further connected to the overheat protecting circuit and controls activation of the overheat protecting circuit when the current through the main circuit reaches the predetermined threshold value. Therefore, erroneous operation of the circuit protection device due to a shift in component characteristics of the overheat protecting circuit attributed to limitations in fabrication can be avoided.

Abstract: An apparatus and method for current balance in a multi-phase DC-to-DC converter with a converter output voltage and a plurality of channel currents employs for each channel a multi-input pulse width modulator or an ordinary pulse width modulator in conjunction with a multi-input comparator to produce a respective PWM signal to regulate the corresponding channel current. In addition to the comparison of the converter output voltage with a reference signal to produce an error signal, the apparatus and method compares the error signal with a ramp signal and the corresponding channel current with each of the other channel currents with the multi-input pulse width modulator. Alternatively, a ramp signal is compared by the ordinary pulse width modulator with a signal derived from the multi-input comparator which subtracts the corresponding channel current from each other channel current and sums the error signal.