Patents by Inventor Ling Huang

Ling Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11610840
    Abstract: The present disclosure provides a semiconductor device with air gaps between adjacent conductive lines and a method for forming the semiconductor device. The semiconductor device with air gaps between adjacent conductive lines and a method for forming the semiconductor device. The semiconductor device includes a first dielectric layer disposed over a semiconductor substrate, and a first electrode disposed over the first dielectric layer. The semiconductor device also includes a fuse link disposed over the first electrode, and a second electrode disposed over the fuse link. The semiconductor device further includes a third electrode disposed adjacent to the first electrode, and a second dielectric layer separating the first electrode from the first dielectric layer and the third electrode.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 21, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Patent number: 11591400
    Abstract: The present invention is directed to novel B7-H3-binding molecules capable of binding to human and non-human B7-H3, and in particular to such molecules that are cross-reactive with B7-H3 of a non-human primate (e.g., a cynomolgus monkey). The invention additionally pertains to B7-H3-binding molecules that comprise Variable Light Chain and/or Variable Heavy Chain (VH) Domains that have been humanized and/or deimmunized so as to exhibit a reduced immunogenicity upon administration to recipient subjects. The invention particularly pertains to bispecific, trispecific or multispecific B7-H3-binding molecules, including bispecific diabodies, BiTEs, bispecific antibodies, trivalent binding molecules, etc. that comprise: (i) such B7-H3-binding Variable Domains and (ii) a domain capable of binding to an epitope of a molecule present on the surface of an effector cell.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: February 28, 2023
    Assignee: MacroGenics, Inc.
    Inventors: Deryk T. Loo, Ling Huang, Leslie S. Johnson, Thomas Son, Juniper A. Scribner, Ezio Bonvini
  • Patent number: 11595067
    Abstract: An electronic device may include wireless circuitry with a baseband processor, a digital transmitter, a digital-to-analog-converter (DAC), and an antenna. The baseband processor may produce baseband signals. The digital transmitter may generate self-interference-compensated signals based on the baseband signals. The DAC may generate radio-frequency signals for transmission by the antenna based on the self-interference-compensated signals and square-wave local oscillator waveforms. The digital transmitter may include a self-interference canceller that generates the self-interference-compensated signals. The self-interference-compensated signals may mitigate the creation of self-interferer repetition replicas that land on the carrier frequency of the radio-frequency signals. This may allow the radio-frequency signals to be free from error vector magnitude degradation and spectral regrowth that would otherwise be produced due to self-interference in the radio-frequency signals output by the DAC.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: February 28, 2023
    Assignee: Apple Inc.
    Inventor: Yen-Ling Huang
  • Patent number: 11582957
    Abstract: The invention relates to a genetically modified mouse comprising a heterozygous mutation of Tardbp (TDP-43) gene in that the Asn at amino acid 390 in TDP-43 is substituted with an amino acid that is different from Asn, wherein the genetically modified mouse exhibits Amyotrophic lateral sclerosis (ALS)-like phenotypes, TDP-43 proteinopathies and/or motor neuron degeneration. The invention also so relates to an isolated spinal cord motor neuron differentiated from an embryonic stem cell (ESC) that is obtained from an offspring of a genetically modified mouse according to the invention. Methods for identifying an agent alleviating and/or suppressing ALS-TDP pathogenesis are also disclosed.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 21, 2023
    Assignee: ACADEMIA SINICA
    Inventors: Che-Kun James Shen, Shih-Ling Huang
  • Patent number: 11588029
    Abstract: The present disclosure provides a method for manufacturing a semiconductor structure having a vertical fin with an oxidized sidewall. The method of manufacturing the semiconductor structure includes the steps of providing a substrate having a bottom source/drain and a bottom cathode/anode; forming a channel fin on the bottom source/drain of the substrate and a vertical fin on the cathode/anode of the substrate; forming a top source/drain on the channel fin and a top cathode/anode on the vertical fin; forming a gate structure on the channel fin; and forming an oxidized sidewall on the vertical fin.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: February 21, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Patent number: 11575016
    Abstract: The present application discloses a method for fabricating a semiconductor device includes providing a substrate, forming a gate stack on the substrate and a pair of heavily-doped regions in the substrate, forming a programmable contact having a first width on the gate stack, and forming a first contact having a second width, which is greater than the first width, on one of the pair of heavily-doped regions.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: February 7, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Patent number: 11574897
    Abstract: The disclosure provides an electronic device and a method of manufacturing an electronic device. The electronic device includes a first substrate, a plurality of light-emitting dies, a transparent material layer, a sealing material, and a second substrate. The plurality of light-emitting dies are disposed on the first substrate. The transparent material layer is disposed on the first substrate. The sealing material is disposed on the first substrate and surrounds the transparent material layer. The second substrate is adhered to the first substrate through the transparent material layer and the sealing material.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: February 7, 2023
    Assignee: Innolux Corporation
    Inventors: Yi-An Chen, Kuan-Hung Kuo, Tsau-Hua Hsieh, Kai Cheng, Wan-Ling Huang
  • Patent number: 11569162
    Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a reinforcing sheet. The base film includes a first surface, a second surface opposite to the first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is mounted on the mounting region and electrically connected to the patterned circuit layer. The reinforcing sheet is disposed on the first surface and/or the second surface and exposes the chip, wherein a flexibility of the reinforcing sheet is substantially equal to or greater than a flexibility of the base film.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: January 31, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chiao-Ling Huang, Tai-Hung Lin
  • Patent number: 11561376
    Abstract: In an optical imaging lens, a first lens element has negative refracting power, a second lens element has negative refracting power, an optical axis region of the object-side surface of the third lens element is concave, an optical axis region of the object-side surface of the fourth lens element is convex, an optical axis region of the object-side surface of the fifth lens element is convex, a sixth lens element is arranged to be a lens element in a second order from an image-side to an object-side and a seventh lens element is arranged to be a lens element in a first order from the image-side to the object-side to satisfy: (G23+T3+T4+G45)/L57?2.700 and 1+2?80.000.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: January 24, 2023
    Inventors: Pei-Chi Wang, Yi-Ling Huang, Yen-Cheng Huang
  • Publication number: 20230008519
    Abstract: An automatic vehicle positioning management system includes an on-vehicle apparatus and a portable device. The on-vehicle apparatus, installed on a vehicle, acquires a first location of the vehicle through wireless positioning. The first location is sent to the portable device which acquires a second location of the vehicle through GPS. When multiple vehicles form a fleet, each vehicle respectively sends its first and second locations to a server through its portable device. The second location of each vehicle is corrected by operations of point error analysis, image overlay and point error correction, so that the fleet can be managed more precisely.
    Type: Application
    Filed: July 7, 2021
    Publication date: January 12, 2023
    Inventors: HSIU-LING HUANG, WEI-CHIH WU, MING-CHIEH LIN
  • Patent number: 11551963
    Abstract: A semiconductor device package includes a substrate, a partition structure and a polymer film. The partition structure is disposed on the substrate and defines a space for accommodating a semiconductor device. The polymer film is adjacent to a side of the partition structure distal to the substrate. A first side surface of the polymer film substantially aligns with a first side surface of the partition structure.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: January 10, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei Ling Ma, Ying-Chung Chen, Hsin-Ying Ho, Cheng-Ling Huang, Chang Chin Tsai
  • Patent number: 11545520
    Abstract: The display device includes a first unit, and a plurality of second units. The first unit includes a first substrate, and a light blocking structure disposed on the first substrate. The light blocking structure has a plurality of first openings. Each one of the second units includes a second substrate, and a plurality of light emitting diodes disposed on the second substrate. The light emitting diodes correspond to a portion of the first openings. The second units are adhered to the first unit.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: January 3, 2023
    Assignee: Innolux Corporation
    Inventors: Yi-An Chen, Wan-Ling Huang, Tsau-Hua Hsieh
  • Patent number: 11528832
    Abstract: An electronic device is provided, which is for coupling to another electronic device in a side-by-side manner, and the electronic device includes a substrate, a first thermal dissipation sheet and a thermal dissipation element. The substrate includes a first surface and a second surface. The first thermal dissipation sheet is disposed on the first surface. The thermal dissipation element is disposed on the substrate. The first thermal dissipation sheet is disposed between the thermal dissipation element and the substrate, and the thermal dissipation element at least partially overlaps the first thermal dissipation sheet.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: December 13, 2022
    Assignee: InnoLux Corporation
    Inventors: Wan-Ling Huang, Tzu-Yuan Lin, Geng-Fu Chang, Chun-Hsien Lin, Shu-Ming Kuo, Jui-Feng Ko, Tsau-Hua Hsieh
  • Patent number: 11526203
    Abstract: A method for switching a power mode of a computer device is adapted to a computer accessory. The method comprises setting a power management mode of the computer device to be awakened when connected to the external power; connecting the computer accessory to a host connector of the computer device to establish a power connection and a communication connection through a host signal pin set of the host connector; through the power connection and the communication connection, detecting and determining the power mode of the computer device; and executing one of following steps upon receiving the switch signal: when the power mode is the normal operation state, transmitting a communication signal; when the power mode is the Suspend-To-RAM state, transmitting a wake up signal; and when the power mode is the Suspend-To-Disk state or the shutdown state, temporarily cutting off the external power and then restoring the external power.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 13, 2022
    Assignee: LUXSHARE-ICT CO., LTD.
    Inventors: Sean P. O'Neal, Erh-Tai Tsai, Quan-Fei Ning, Chih-Hsiung Chang, Ya-Ling Huang
  • Publication number: 20220387590
    Abstract: The invention provides novel photolytic compounds and prodrugs, nanoparticles and compositions thereof, and methods of conducting photolysis mediated by triplet-triplet annihilation.
    Type: Application
    Filed: October 7, 2020
    Publication date: December 8, 2022
    Inventors: Gang Han, Ling Huang
  • Patent number: 11521924
    Abstract: The present disclosure provides a semiconductor device with a fuse structure and an anti-fuse structure and a method for forming the semiconductor device. The semiconductor device includes a first dielectric layer disposed over a semiconductor substrate, and a first electrode disposed over the first dielectric layer. The semiconductor device also includes a fuse link disposed over the first electrode, and a second electrode disposed over the fuse link. The semiconductor device further includes a third electrode disposed adjacent to the first electrode, and a second dielectric layer separating the first electrode from the first dielectric layer and the third electrode. The first electrode, the fuse link, and the second electrode form a fuse structure, and the first electrode, the third electrode, and a portion of the second dielectric layer between the first electrode and the third electrode form an anti-fuse structure.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: December 6, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Patent number: 11513618
    Abstract: The present invention provides an all-in-one machine, a method for the all-in-one machine to realize quick touch in all channels, and a computer storage medium. The method includes: detecting which channel is currently connected to the main board, and controlling a USB selecting switch to connect a first data port of a touch frame with a USB port of a device or module to which the currently connected channel belongs, based on the detected channel information; determining whether there is an action to call a touch menu when detecting that the channel connected to the main board is an internal PC module channel or an external device channel; and if so, activating the main board to start a touch menu application program, and making response, by the main board, to touch data within an area of the touch menu transmitted from the touch frame through the second data port, after the touch menu has been called and before an action of leaving the touch menu is detected.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: November 29, 2022
    Assignee: Guangzhou Shirui Electronics Co., Ltd.
    Inventors: Haiqing Rao, Songqing Xu, Weigao Liu, Ling Huang, Jianxin Zhang, Wensheng Cai, Guining Pan
  • Patent number: 11516919
    Abstract: A display device is provided. The display device includes an auxiliary substrate, a display substrate, and a circuit board. The auxiliary substrate includes an auxiliary circuit. The display substrate is disposed on the auxiliary substrate. The display substrate includes a circuit. The circuit board is electrically connected to the auxiliary substrate. The circuit of the display substrate is electrically connected to the auxiliary circuit through a first conductive via, and the circuit board provides a signal to the auxiliary circuit.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 29, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Wan-Ling Huang, Jian-Jung Shih, Tsau-Hua Hsieh
  • Patent number: 11515405
    Abstract: The present application discloses a method for fabricating a semiconductor device with a programmable feature such as anti-fuse The method includes forming a semiconductor fin on a buried insulating layer; forming a dummy gate structure on the semiconductor fin; forming a top insulating layer over the semiconductor fin and covering the dummy gate structure; removing the dummy gate structure and concurrently forming a first trench in the top insulating layer; performing an etch process in the first trench to form a tapered pit separating the semiconductor fin; forming a first insulating layer to completely fill the first trench and the tapered pit; and replacing the semiconductor fin with first conductive blocks.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: November 29, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chin-Ling Huang
  • Publication number: 20220375931
    Abstract: A device comprises a first transistor, a second transistor, a first contact, and a second contact. The first transistor comprises a first gate structure, first source/drain regions on opposite sides of the first gate structure, and first gate spacers spacing the first gate structure apart from the first source/drain regions. The second transistor comprises a second gate structure, second source/drain regions on opposite sides of the second gate structure, and second gate spacers spacing the second gate structure apart from the second source/drain regions. The first contact forms a first contact interface with one of the first source/drain regions. The second contact forms a second contact interface with one of the second source/drain regions. An area ratio of the first contact interface to top surface the first source/drain region is greater than an area ratio of the second contact interface to top surface of the second source/drain region.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 24, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Pin HUANG, Hou-Yu CHEN, Chuan-Li CHEN, Chih-Kuan YU, Yao-Ling HUANG