Patents by Inventor Ling Lin

Ling Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145641
    Abstract: A color conversion panel and a display device are provided. The color conversion panel includes an opaque substrate and a sapphire substrate. The opaque substrate includes a plurality of first pixel openings, a plurality of second pixel openings and a plurality of third pixel openings. The first pixel openings are filled with red quantum dot material, and the second pixel openings are filled with green quantum dot material. The sapphire substrate is on the opaque substrate. A first surface of the sapphire substrate that faces the opaque substrate has a plurality of first arc surfaces corresponding to the first pixel openings, a plurality of second arc surfaces corresponding to the second pixel openings, and a plurality of third arc surfaces corresponding to the third pixel openings.
    Type: Application
    Filed: December 15, 2022
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Kai-Ling Liang, Wei-Hung Kuo, Hui-Tang Shen, Chun-I Wu, Suh-Fang Lin
  • Patent number: 11972984
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 30, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Ling Lin, Wen-An Liang, Chen-Ming Huang
  • Patent number: 11973425
    Abstract: A power converter includes a power stage circuit, a ramp generator circuit, and a control circuit. The power stage circuit generates an output signal according to an input signal and a control signal. The ramp generator circuit generates a ramp signal according to the control signal, the input signal, and the output signal. The control circuit generates the control signal according to the output signal, a reference signal, and the ramp signal.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: April 30, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chieh-Ju Tsai, Ching-Jan Chen, Zhen-Guo Ding, Zhe-Hui Lin, Wei-Ling Chen
  • Patent number: 11974462
    Abstract: Disclosed are a display panel and a display device. The display panel includes a base substrate; a plurality of data signal lines on the base substrate, and a plurality of pixel units; and each pixel unit has a transparent area and a non-transparent area; the pixel unit includes a plurality of sub-pixels in the non-transparent area. All sub-pixels in the display panel are arranged in an array, each column of sub-pixels corresponds to a respective one of the data signal lines, and at least part of the data signal lines are arranged around the transparent areas.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: April 30, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ling Wang, Yicheng Lin, Pan Xu, Guoying Wang, Guang Yan
  • Publication number: 20240136472
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240136444
    Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Inventors: Yu-Chu Lin, Chi-Chung Jen, Wen-Chih Chiang, Yi-Ling Liu, Huai-Jen Tung, Keng-Ying Liao
  • Publication number: 20240136291
    Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.
    Type: Application
    Filed: January 12, 2023
    Publication date: April 25, 2024
    Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
  • Publication number: 20240137829
    Abstract: A method of wireless communication by a user equipment (UE) supporting multiple subscriptions, includes camping on a first cell of a first radio access technology (RAT) with a first data subscription, and camping on a second cell of a second RAT with a second data subscription. The method also includes triggering a transition to the first cell of the first RAT for the second data subscription. The method further includes performing, with the first data subscription, activities on behalf of the second data subscription.
    Type: Application
    Filed: May 5, 2021
    Publication date: April 25, 2024
    Inventors: Daowei LIN, Zengran WAN, Xin JIANG, Weifeng DENG, Boting WANG, Jun DENG, Hewu GU, Xiaochen CHEN, Zengyu HAO, Ling XIE, Tom CHIN, Zhongyue LOU, Bhupesh Manoharlal UMATT
  • Patent number: 11967620
    Abstract: Embodiments of the present disclosure provide a thin film transistor, a method of manufacturing the same, and a display device. The thin film transistor includes a metal conductive pattern layer, an interlayer insulating layer, and a metal oxide layer; and the metal conductive pattern layer includes: a light shielding pattern, a source signal line, and/or a drain signal line; the metal oxide layer includes: a source electrode, a drain electrode, and an active layer. An orthographic projection of the active layer on the base substrate has an overlapping region with that of the light shielding pattern; the source electrode extends through the interlayer insulating layer to connect to the source signal line, and/or the drain electrode extends through the interlayer insulating layer to connect to the drain signal line.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Pan Xu, Yicheng Lin, Cuili Gai, Ling Wang, Yongqian Li
  • Patent number: 11964299
    Abstract: A method for manufacturing a golf ball having a multi-layered pattern is provided. Firstly, a semi-finished product of the golf ball is provided and includes a ball-shaped body and a base layer covering an outer surface of the ball-shaped body. Then, the semi-finished product of the golf ball is rotated at a predetermined rotation speed, and a color paint is applied to the semi-finished product of the golf ball by spraying from each of an upper position, a middle position, and a lower position. The multi-layered pattern includes an upper-layer pattern area, a mid-layer pattern area, and a lower-layer pattern area that are different in color from each other.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: April 23, 2024
    Assignee: FOREMOST GOLF MFG. LTD.
    Inventors: Chia-Sheng Huang, Chi-Ling Lin, Chia-Cheng Wu, Ching-Hsiang Liu
  • Patent number: 11964409
    Abstract: A multi-shot moulding part structure includes a first structural part, an ink decoration layer, and a second structural part. The first structural part has a first area surface, a second area surface, and a joining surface located on the second area surface. The joining surface is non-parallel to the second area surface. The ink decoration layer is spread on the first area surface and the second area surface, but not on the joining surface. The second structural part is combined with the first structural part and covers the second area surface. The second structural part touches the joining surface. By the second structural part touching the joining surface of the first structural part that is not coated with the ink decoration layer, the structural bonding strength between the first structural part and the second structural part is enhanced.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 23, 2024
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Wen-Ching Lin, Ting-Yu Wang, Fa-Chih Ke, Yu-Ling Lin, Wen-Hsiang Chen
  • Patent number: 11965069
    Abstract: A heat-shrinkable polyester film made of a polyester-forming resin composition includes a recycled material, and has an exothermic crystallization peak and an endothermic melting peak which are determined via differential scanning calorimetry, and which satisfy relationships of T2?T1?68° C. and T3?T2?78° C., where T1 represents an onset point of the exothermic crystallization peak, T2 represents an end point of the exothermic crystallization peak and an onset point of the endothermic melting peak, and T3 represents an end point of the endothermic melting peak. A method for manufacturing the heat-shrinkable polyester film is also disclosed.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 23, 2024
    Assignee: FAR EASTERN NEW CENTURY CORPORATION
    Inventors: Li-Ling Chang, Yow-An Leu, Ting-Yu Lin, Ching-Chun Tsai, Wen-Yi Chang
  • Publication number: 20240124844
    Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240125016
    Abstract: The invention provides 3D-knitted spacer fabrics of high breathability and moisture management and methods of making the 3D-knitted spacer fabrics. The middle layer of the fabric is made of hydrophilic material, comprising two yarns, a blended thermo-fuse wicking yarn comprising hydrophilic fiber and thermo-fuse fiber, and a non-supportive hydrophilic functional wicking yarn. The top layer of the fabric comprises a hydrophilic yarn, and the third layer of the fabric comprises a hydrophobic yarn. The 3D-knitted spacer fabrics are useful in clothing and equipment for wear in high temperature environments.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 18, 2024
    Inventors: Tianqi ZHOU, Yuyan WANG, Rui LUO, Ling LIN, Zheng GU, Peng ZHOU, Jing XU
  • Publication number: 20240120313
    Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
  • Publication number: 20240117314
    Abstract: The present invention relates to a method for preparing a modified stem cell, including the following steps: a cell culture step: culturing stem cells in a first culture medium of a culture dish at a predetermined cell density, and removing the first culture medium after a first culture time to obtain a first cell intermediate; an activity stimulation step: preserving the first cell intermediate in a freezing container having a cell cryopreservation solution, and performing a constant temperature stimulation treatment or a variable temperature stimulation treatment for at least more than 1 day; and a product collection step: after completing the activity stimulation step, placing the freezing container in an environment at a thawing temperature for thawing, and then removing the cell cryopreservation solution to obtain the modified stem cell. The modified stem cell can release at least one or more of IL-4, IL-5, IL-13, G-CSF, Fractalkine, and EGF.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Inventors: Ruei-Yue Liang, Chia-Hsin Lee, Kai-Ling Zhang, Po-Cheng Lin, Ming-Hsi Chuang, Yu-Chen Tsai, Peggy Leh Jiunn Wong
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Patent number: 11955430
    Abstract: A method of manufacturing a semiconductor device includes forming a first dielectric layer over a substrate, forming a metal layer in the first dielectric layer, forming an etch stop layer on a surface of the first dielectric layer and the metal layer, removing portions of the metal layer and the etch stop layer to form a recess in the metal layer, and forming a tungsten plug in the recess. The recess is spaced apart from a bottom surface of the etch stop layer.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Hsuan Lin, Hsi Chung Chen, Ji-Ling Wu, Chih-Teng Liao
  • Patent number: D1022792
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: April 16, 2024
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Zheng Gu, Peng Zhou, Wenbo Wang, Xiaojuan Zhu, Ling Lin, Lyndon Liu
  • Patent number: D1024061
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: April 23, 2024
    Assignee: FSP TECHNOLOGY INC.
    Inventors: Li Kuan, Mei-Ling Lin